Editing Psion Series 3 (section)

== Hardware ==

{| class="wikitable styled-table" style="width:70%; text-align:left;"
|+'''Psion Series 3 specification'''<ref name="wp3" /><ref name="spec">[https://www.psion.netogram.com/psionspecifications.html "Psion specifications"], netogram.com. Source for the comparative specification figures, video memory access mode, screen dimensions, weight and serial speed.</ref>
! Item !! Specification
|-
| '''Processor''' || NEC '''V30H''' (80C86-compatible, 16-bit) at '''3.84 MHz'''
|-
| '''System chips''' || Psion '''ASIC1''' (system controller) and '''ASIC2''' (clock, keyboard, buzzer, SSD and PSU interface)
|-
| '''RAM''' || 128 KB or 256 KB
|-
| '''Display''' || 240 × 80 monochrome LCD, 97 × 39 mm, black/white only. No grey plane, no backlight.
|-
| '''Video memory''' || 8-bit access at half speed
|-
| '''Sound''' || Piezoelectric buzzer. '''No sound recording.''' DTMF tone dialling through the speaker
|-
| '''Storage''' || Two internal SSD slots
|-
| '''Serial''' || 9600 baud via the optional link pod, with the software held in the pod's ROM
|-
| '''Main power''' || 2 × AA cells
|-
| '''Backup power''' || '''CR1620''' lithium coin cell
|-
| '''Size and weight''' || 165 × 85 × 22 mm, 275 g with batteries
|}

=== Why the Series 3 is slower ===

The clock is held to 3.84 MHz for a specific, documented reason. '''ASIC1 assembles each 16-bit word from two 8-bit ROM reads''', which needs ROM with about a 250 ns access time at that clock. Readily available mask ROMs of the period managed 200 ns, and that is what capped the Series 3.<ref name="sibo">Psion PLC, ''SIBO Hardware Reference'', version 2.10, 3 February 1995, in the [https://doc.psion.info/books/the-psion-sibo-software-development-kit/page/hardware-reference Psion Documentation Project]. Source for the SIBO architecture, ASIC1 and ASIC2 functions, the clock-speed limitation, the memory and I/O decoding, the interrupt table, the watchdog, the NMI sources, the timekeeping mechanism and the supply rails.</ref>

The [[Psion Series 3a|3a]]'s ASIC9 does 16-bit accesses instead, which doubled the clock for the same ROM.<ref name="sibo" />

=== The three-chip architecture ===

{| class="wikitable styled-table" style="width:70%; text-align:left;"
|+'''SIBO principal chips as used in the Series 3'''<ref name="sibo" />
! Device !! Package !! Function
|-
| '''V30H''' || — || 80C86-compatible CPU, fully static, so the clock can be stopped at any time with no loss of state — the basis of the whole SIBO power-saving strategy
|-
| '''ASIC1''' || 100-pin QFP, ~4300 gates || Bus controller, bus converter, 16-bit timer, LCD controller, memory and I/O decoding, 8-channel interrupt controller, watchdog, address and I/O protection
|-
| '''ASIC2''' || 80-pin QFP, ~2200 gates || System clock oscillator, on/off control, the SIBO serial protocol controller, keyboard interface, buzzer interface and NMI generation
|}

Two consequences matter on the bench:

* '''ASIC1 stops the processor clock on a HALT instruction''' and holds it low until an interrupt or NMI arrives. A machine that appears frozen may simply be waiting for an interrupt that never comes.<ref name="sibo" />
* '''The watchdog is a 2-bit counter clocked at 4 Hz''' that raises an NMI if it is not reset — roughly 0.75 seconds with interrupts disabled.<ref name="sibo" />

=== Timekeeping — a Series 3-specific weakness ===

The ASIC1/ASIC2 machines have '''no hardware real-time clock'''. They keep time using the free-running counter, which means '''the CPU must wake up periodically (roughly every 8 hours) to maintain the time'''. If the CPU cannot start — because there are no main batteries — '''the time is lost'''.<ref name="sibo" />

This was one of the specific limitations ASIC9 was designed to remove, and it is why a Series 3 that has been left with the AA cells out comes back with the clock wrong while a 3a does not.<ref name="sibo" />

=== SIBO serial channels ===

ASIC2 contains an 8-channel serial protocol controller. The channel assignment is worth knowing, because it explains what shares a path with what:<ref name="sibo" />

{| class="wikitable styled-table" style="width:60%; text-align:left;"
! Channel !! Function
|-
| 0 || Power supply
|-
| 1–4 || SSDs
|-
| 5, 6 || Expansion ports
|-
| 7 || High-speed link
|}