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== Key features == * '''All-FPGA core''' โ replaces every major MOS device, eliminating ageing silicon while preserving ~99.9 % software and demo compatibility, including tricky โcycle-tricksโ and bad-line conditions. * '''Integrated 1541-Ultimate II+''' โ IEC drive emulation (D64/G64/TAP/T64/PRG), freezer, action-replay, REU (RAM Expansion Unit) up to 16 MB and GeoRAM, plus KERNAL cartridge injection and SID player. * '''Digital video & audio''' โ lag-free HDMI output at 720 p with optional scan-lines, border cropping and PAL/NTSC switching on-the-fly; 48 kHz 16-bit stereo mixes real SIDs with FPGA soft-SID. * '''Dual-SID support''' โ two physical sockets with automatic 9 V/12 V rail sensing; FPGA mixer allows true stereo separation and independent filter curves per chip. * '''Network stack''' โ 100 Mbit LAN for disk-image mounting over FTP/TFTP, firmware updates, IEC drive sharing and real-time clock synchronisation via NTP. * '''Ultimate Command Interface''' โ JSONโRPC over USB or Ethernet for headless control and integration with PC front-ends. * '''Silent & cool''' โ the board draws โ 1.1 A @ 5 V; an optional 40 mm fan header is provided but rarely needed.
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