Editing Acorn Archimedes A3020 (section)

== Processor ==

The A3020 uses the '''ARM250''' clocked at 12 MHz. The ARM250 was Acorn's first ARM system-on-chip: it integrates onto one die the four devices that were separate on the [[Acorn Archimedes A3000|A3000]] — an ARM2-class processor core, the MEMC1a memory controller, the VIDC1a video and sound controller, and the IOC input/output controller.<ref name="wp">[https://en.wikipedia.org/wiki/Acorn_Archimedes "Acorn Archimedes"], Wikipedia.</ref> The core is cacheless (ARM2-class), so the A3020 delivers roughly 7 MIPS — about the same as the A3000's discrete chipset would at 12 MHz, but well short of the ARM3-based [[Acorn Archimedes A5000|A5000]].<ref name="wp" /><ref name="chris" />

Running the memory at 12 MHz with 80 ns DRAM, against the A3000's 8 MHz and 125 ns parts, gives the machine its performance step over its predecessor.<ref name="chris" /><ref name="wp" /> A Chips & Technologies '''82C711''' peripheral controller provides the IDE, floppy, serial and parallel interfaces in a single support chip.<ref name="82c711">[https://arcwiki.org.uk/index.php/82C711 "82C711"], Arc Wiki.</ref>