Editing PDP-8 Power Supply Restoration (section)

== How it works ==
* A tapped winding on the ferroresonant transformer T1 feeds full-wave rectifiers for the unregulated +10 V and −15 V supplies.<ref name="f87d" />
* An independent winding with taps at 40, 42 and 45 V feeds diodes D1 and D2 and the 34,400 µF bank C1 to C4, giving 40 V floating for the memory supplies.<ref name="f87d" /><ref name="f87sch" />
* Series pass transistors Q1 (inhibit) and Q2 (read/write) regulate that 40 V under the control of two G808 power supply control modules. Each G808 compares its output against a Zener reference, reduces the voltage as the memory array warms (via a positive-coefficient thermistor of 350 Ω at 25 °C in the array) and has adjustment potentiometer R16. The output range is 27 to 37 V.<ref name="f87d" /><ref name="f87pm" />
* A G809 relay driver watches the −15 V line and energises relay K1 once it reaches −14 V. K1's contacts connect the inhibit and read/write supplies to the memory. If −15 V falls below −14 V the relay drops out and the OK line goes to ground, halting the processor.<ref name="f87d" />
* The marginal-check supply is a variable transformer T2, half-wave rectifier D3 and filter C5, switchable to either polarity and metered on the front of the supply.<ref name="f87d" /><ref name="f87sch" />