Editing Psion Series 5 (section)

== Architecture ==

The Series 5 is the first Psion product to use the '''ERA architecture''' around the ARM 7100. It is built as a '''main PCB and a ROM daughter PCB'''.<ref name="sm" />

=== Clocks ===

The CPU's main clock input is '''3.6864 MHz ±50 ppm''' from crystal X2 in fundamental mode, '''multiplied internally by five to 18.432 MHz''' (54.2535 ns). An expansion clock at that frequency is output from the ARM 7100 and used by the '''CompactFlash interface device, ASIC12 (IC2)'''.<ref name="sm" />

That CompactFlash controller is the part the developer and Linux-porting community know as '''ETNA''' — a bespoke, essentially undocumented Psion device present in both the Series 5 and the 5mx.<ref name="wuffs" /> The service manual and the community use different names; no document states in so many words that they are the same part, but they occupy the same role.

=== Reset ===

Two distinct resets, and knowing which is which matters when a machine misbehaves:<ref name="sm" />

* '''Power-On Reset (cold reset)''' — generated by a '''Ricoh RN5VLR20AA''' open-drain voltage detector (IC4) when VDD crosses a threshold set to '''2.0 V ± 2.5 %'''. An RC network stretches the low state to give the ARM 7100 time to reset. '''A cold reset erases everything held in volatile storage''' and indicates that all power was lost and re-applied.
* '''User Reset (warm reset)''' — a switch that '''forms part of the lithium backup battery's negative contact''', normally reachable only by opening the backup battery cover and using a pointed instrument. Held inactive high by pull-up R1, with a small capacitor C113 providing noise bypass to protect against inadvertent resets during ESD events. '''All user data should survive a warm reset.'''

=== Display and digitiser ===

The LCD is a '''640 × 240 passive-matrix module, normally-white'''. All data, clock and synchronisation signals come from the ARM 7100.<ref name="sm" />

A '''separate passive resistive digitiser''' is assembled over it: a glass lower plate and a hardened plastic top plate, resistive ink printed on the inner faces, four electrical connections sensing resistance across the X and Y axes, and the two conductive faces held apart by '''very small bumps moulded into the plastic member'''. It connects by a '''22-way flat flexible cable'''.<ref name="sm" />

The LCD's supply rails '''must be enabled and disabled in a defined sequence''' so that no residual DC is ever left across the panel — DC causes the liquid crystal to drift and eventually damages its polarisation irreversibly. The logic supply VLL comes from an ordinary port output because it needs only about 2 mA; the '''main high-voltage supply is an ARM 7100-controlled boost switched-mode supply with a 4-bit DAC acting as a variable resistor in the feedback path'''.<ref name="sm" />

=== Keyboard ===

'''53 keys''' in a conventional QWERTY arrangement, on a separate switch matrix assembly that slides out as the screen opens. It connects to the main PCB by a '''22-way flat flexible cable in a 22-way ZIF connector, of which only 20 ways carry keys''' — '''the outside pins are grounded to give the keyboard membrane a ground ring for ESD protection'''.<ref name="sm" />

=== ROM board options ===

Psion built three ROM daughter boards:<ref name="sm" />

{| class="wikitable styled-table" style="width:60%; text-align:left;"
! Board !! Devices
|-
| ROM Board 01 || 3 × Flash devices
|-
| ROM Board 02 || 1 × ROM device and 1 × Flash device
|-
| ROM Board 03 || 2 × ROM devices
|}

'''Intermittent faults can be caused by dry or faulty joints on the daughter PCB''', and Psion suggest swapping it early in diagnosis as a quick test. Any replacement '''must be the same OS build number and language''', checkable with '''Ctrl+H''' in the System screen.<ref name="sm" />

=== Standby current ===

Measured with the processor asleep at 2.75 V:<ref name="sm" />

{| class="wikitable styled-table" style="width:50%; text-align:left;"
! Model !! Standby current
|-
| 4 MB || 1.50 mA
|-
| 8 MB || 2.10 mA
|}