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== Technical specification (Model 1, BIOS v1.10) == {| class="wikitable styled-table" style="width:70%; text-align:center;" |- ! style="background:#ddd;" |Processing |- | Main 68k | 12.500 MHz (25 MHz รท 2) wait-stated 3โ4 cycles to word-RAM |- | Sub MCU | 3.58 MHz (NTSC crystal) โ handles CD block decode, seek, audio FIFO |- | DMA | 5.0 MBยทsโปยน peak hostโword-RAM |- ! style="background:#ddd;" |Memory map (simplified) |- | $0000 00โ$1F FFFF | 2 MB Program RAM |- | $2000 00โ$23 FFFF | 256 KB Word-RAM bank 0 |- | $2400 00โ$27 FFFF | 256 KB Word-RAM bank 1 (dual-port) |- | $2FFF E0โ$2FFF FF | PCM regs & sample RAM (128 KB windowed) |- | $3E00 00โ$3E3F FF | Backup SRAM 64 KB (battery) |- | $3F00 00โ$3F3F FF | ASIC / host control regs |- | $3F00 40โ$3F00 7F | Sub-CPU I/O FIFO |- | $FF00 00โ$FFFF FF | BIOS ROM 128 KB (mirrored) |} === Video timing === * Pixel clock 13.5 MHz (NTSC) / 13.32 MHz (PAL) via VDP master. * Scaled plane generated at 256รA & line-buffered into Genesis VDP CRAM. * V-blank interrupt every 262 lines NTSC (โ 59.92 Hz).
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