Jump to content

Super Nintendo General Maintenance: Revision history

Diff selection: Mark the radio buttons of the revisions to compare and hit enter or the button at the bottom.
Legend: (cur) = difference with latest revision, (prev) = difference with preceding revision, m = minor edit.

23 September 2026

  • curprev 19:5519:55, 23 September 2026 Josh talk contribs 23,621 bytes +23,576 Restore as a full SNES-specific page (was a redirect to the Super Famicom guide): SNS-/SNSP-/SNN- board identification, GPM (ground-plane PCB process) distinguished from 1CHIP (later chip integration), SNSP-CPU-01 component map, 10 V DC 850 mA centre negative with 13.5 +/- 1.5 V no-load normal, F1 1.5 A, 7805 at U12 (U9 on 1CHIP/SNN), no 12 V or 3.3 V rail and no console battery, region-specific master clocks, CIC 3.8-4.2 MHz, reset order PPU2-PPU1-CPU. Cited to the Playtronic and Japanese Ni... undo Tag: Removed redirect
  • curprev 18:4318:43, 23 September 2026 Josh talk contribs 45 bytes −4,313 Redirect to the Super Famicom maintenance guide, which carries the same ground from Nintendo's own service manual. Removed from here: the claim that SNS-CPU-GPM boards are '1CHIP' (they are not), the non-existent console save battery, the invented 'power up every 6-12 months to keep capacitors formed' interval, and the unsourced board-revision date table undo Tag: New redirect

9 August 2025

5 May 2025