Atari Mega STE Schematic

The eleven-sheet circuit diagram for the Atari Mega STE main board, revision 2, April 1990. Covers the 68000 and its 16 KB cache SRAM; the master oscillator (32.215905 MHz NTSC / 32.084988 MHz PAL), the reset and Power Good circuits, the 12-way power connector J201 with its rail assignments including −5 V, the 0.5 A fuse F21, the power-LED and auxiliary-fan headers and the TOS ROM device-type jumpers W201–W203; the MFP, the two ACIAs, MIDI, keyboard, parallel and serial ports with their MC1488/1489 line drivers; the real-time clock and battery, the floppy controller and the DMA port; the four SIMM sockets and the DIP switch S701 whose segment 7 enables the 1.44 MB drive; the System Control Unit and VMEbus interrupt logic; serial ports A and B; DMA sound; and the MC68881 socket.

Download the Atari Mega STE Schematic here: File:Atari Mega STE Schematic Rev 2.pdf