Macintosh Old World ROM

Showing all three diagnostic icons of Old World ROM: Missing OS (flashing question mark), Happy Mac (successful POST), and Sad Mac (hardware failure detected during POST)

Old World ROM refers to Apple Macintosh computer systems that store the Macintosh Toolbox firmware and boot code in physical ROM chips—either socketed or soldered to the motherboard. This architecture encompasses all Motorola 68000-based Macintosh computers, NuBus-based Power Macintosh models, and first-generation PCI Power Macintosh systems including the "Beige" Power Macintosh G3. These machines utilize a unified, ROM-based boot sequence controlled entirely by Toolbox logic, in contrast to later New World ROM systems (beginning with the iMac and Blue & White Power Mac G3) which load the Toolbox from disk via Open Firmware 3.0.

Architecture Overview

ROM Organization and Contents

The Old World ROM contains several critical components that define the Macintosh computing experience:

Core Components:

Macintosh Toolbox routines: QuickDraw graphics engine, Window Manager, Menu Manager, Event Manager, Resource Manager, and other GUI managers
Hardware initialization code: CPU configuration, memory controller setup, bus initialization
POST diagnostics: Power-On Self-Test routines for memory, ROM checksum, and basic hardware verification
Boot loader code: Device enumeration and System Folder location routines
68LC040 emulator (PowerPC models): Nanokernel providing transparent 68k compatibility

The ROM size evolved significantly across generations:

64 KB - Macintosh 128K/512K (1984)
128 KB - Macintosh Plus (1986)
256 KB - Macintosh SE, II series (1987)
512 KB - Macintosh IIci, IIfx (1989)
1 MB - Quadra series (1991)
4 MB - Power Macintosh (1994)

PowerPC Architecture and 68k Emulation

PowerPC-based Old World ROM systems implement a sophisticated dual-architecture environment:

Nanokernel initialization: The PowerPC processor begins execution in the Mac OS nanokernel stored in ROM
68LC040 emulation layer: The nanokernel implements a complete Motorola 68LC040 processor emulator
Toolbox execution: The predominantly 68k-based Toolbox ROM code runs within the emulator
Mixed-mode operation: Once Mac OS loads, both native PowerPC and emulated 68k applications execute transparently
Performance optimization: Critical OS routines are progressively replaced with native PowerPC code via the Mixed-Mode Manager

This emulation approach allowed Apple to maintain complete backward compatibility while transitioning to the PowerPC architecture, ensuring all existing Macintosh software continued to function.

Open Firmware Implementation

PCI-based Old World ROM systems include a limited Open Firmware implementation:

Characteristics:

Version 1.0.5 - 2.4: Early, minimal implementations designed primarily to enumerate PCI devices
Limited functionality: Cannot directly boot from HFS volumes or load Mac OS
Toolbox as OF device: The Macintosh Toolbox appears as an Open Firmware device that is selected by default
Bug-prone: Particularly on early machines (Power Macintosh 7200, 7500, 8500, 9500), requiring nvramrc patches or bootloader workarounds
Access method: Hold ⌘ Cmd+⌥ Option+O+F at startup to enter OF prompt

The Open Firmware environment can be modified to boot alternative operating systems, but this requires either:

Custom nvramrc scripts to load non-Mac OS bootloaders
Specially-prepared boot floppies that trick the Toolbox into loading alternative kernels
Bootloaders like BootX that run from within Mac OS

Detailed Boot Sequence

The Old World ROM boot process follows a deterministic sequence of hardware initialization, diagnostics, and system loading phases:

Phase 1: Power-On and Initial Hardware State

When power is applied or the reset button is pressed:

Reset vector execution: The CPU begins execution at the reset vector stored in ROM (address $000000 for 68k, specific to model for PPC)
Hardware initialization: Basic hardware registers are configured to known states
ROM overlay: On 68k systems, ROM is temporarily mapped to low memory ($000000-$3FFFFF) to provide exception vectors
Clock stabilization: System waits for oscillators and PLLs to stabilize (typically 10-50ms)

Phase 2: Power-On Self-Test (POST)

The POST performs comprehensive hardware validation before attempting to boot:

ROM Checksum Test

The first diagnostic verifies ROM integrity:

Algorithm: 32-bit checksum stored in first 4 bytes of ROM
Calculation: XOR or CRC of entire ROM contents
Failure response: System halt with no display (dead Mac)
Bypass: Some modified ROMs disable this check for development purposes

CPU Diagnostics

Basic CPU functionality verification:

Instruction test: Execute sample instructions from each class (arithmetic, logical, branch)
Register test: Write/read patterns to all general-purpose and special registers
Exception test: Verify proper exception handling for divide-by-zero, illegal instruction
Cache test (68030/040): Validate instruction and data cache operation

Memory Test Sequence

The ROM performs extensive RAM testing using multiple algorithms:

Test Patterns:

Walking ones/zeros: Single bit moves through each memory location to detect stuck bits
Address line test: Verifies each address line functions independently
Data bus test: Alternating patterns (0x5555AAAA, 0xAAAA5555) verify all data lines
March patterns: Sequential write/read with complementary patterns
Refresh test: Verifies DRAM refresh circuitry maintains data integrity

68k Memory Test Specifics:

Tests performed in ascending order from $00000000
Each bank tested independently
Failed addresses logged for Sad Mac error codes
Test time increases linearly with RAM size (can be several minutes for 128MB+)

PowerPC Optimizations:

Burst mode testing for faster validation
Parallel testing of multiple banks
Quick test option (samples rather than exhaustive)

Video Initialization

The ROM attempts to initialize video output:

Onboard video check: If present, initialize built-in video controller
Slot scan: Check NuBus slots 9-E or PCI slots for video cards
Option ROM execution: Run initialization code from video card ROM
Frame buffer setup: Allocate and clear video memory
Gray screen: Display uniform gray pattern to indicate video functioning

Failure at this stage results in no video output but the system may continue booting "blind."

Phase 3: Device Enumeration and Boot Device Selection

After successful POST, the ROM searches for bootable devices:

Search Order:

Default startup device: Check PRAM for user-selected boot device
Floppy drive: Check for inserted disk with System Folder
Internal SCSI bus: Scan IDs 0-6 in ascending order
External SCSI bus: Scan IDs 0-6 if no internal boot device found
NuBus/PCI expansion ROMs: Check for bootable option ROMs

Boot Device Validation: For each potential boot device, the ROM verifies:

Valid partition map: Apple Partition Map or MFS/HFS volume header
Blessed System Folder: Directory entry with special attributes indicating bootability
System and Finder files: Required files present in System Folder

Phase 4: Icon Display and Feedback

Based on the boot device search results:

Happy Mac Icon:

Displayed when valid System Folder found
Indicates successful hardware initialization
Control transfers to System file

Sad Mac Icon:

Displayed when hardware failure detected
Accompanied by error code (one or two lines of hexadecimal)
System halts requiring power cycle
Later models play distinctive death chimes

Question Mark Disk:

Flashing disk icon with question mark
No bootable device found
System continues searching for boot device
User can insert bootable floppy or CD

Phase 5: System Loading

Once a valid boot device is found:

Boot blocks execution: First 1024 bytes of boot device contain boot code
System heap initialization: Allocate memory for system data structures
System file loading: Load System suitcase into RAM
ROM patches: Apply bug fixes and updates to ROM routines
Manager initialization: Start Memory Manager, File Manager, Device Manager
Extension loading: Load INITs and CDEVs from System Folder
Finder launch: Start Finder application for user interface

Diagnostic Indicators and Error Conditions

POST Failure Symptoms

Different failure modes produce distinct symptoms that aid in diagnosis:

Symptom	Likely Cause	Diagnostic Approach
No power LED, no fan	Power supply failure	Check fuses, test PSU voltages
Power on but black screen	ROM failure, CPU failure	Reseat ROM if socketed, test with known-good chips
Gray screen, no icons	ROM checksum failure, severe RAM failure	Check first bank of RAM, verify ROM chips
Simasimac pattern	Address line failure, memory controller	Test RAM chips individually, check for corrosion
Chimes of Death	RAM failure detected by POST	Identify failed bank by chime pattern
Sad Mac with code	Specific hardware failure	Decode error code for component identification
Question mark disk	No boot device	Check SCSI chain, verify disk has System Folder
Gray screen with cursor	System software corruption	Boot from known-good disk, reinstall system

Chimes of Death

Old World ROM Power Macintosh models use distinctive error sounds:

Sound Patterns:

Car crash sound: General hardware failure (most common)
Breaking glass: Specific to certain PowerBook models
Brass instruments: PowerPC upgrade card systems
Simple beeps: Late Old World ROM models

Diagnostic Value:

Number of tones can indicate which memory bank failed
Timing between tones may indicate failure severity
Absence of any sound suggests ROM or CPU failure

Memory Test Optimizations

Due to the lengthy memory test times with large RAM configurations:

Bypass Methods:

Command-Option-P-R: Reset PRAM and skip extended tests
Modified ROMs: Some third-party ROMs disable memory test
Warm boot: Restart preserves memory contents, skips full test

Alternative Operating Systems

Boot Method Limitations

The ROM-centric boot process creates challenges for alternative operating systems:

68k and NuBus Power Macs:

Must boot Mac OS first
No direct boot from alternative OS
Requires Mac OS-based boot loader
Examples: BootX for Linux, Basilisk II for Mac OS on Mac OS

PCI Power Macs:

Can modify Open Firmware settings
Possible to boot directly with proper OF configuration
Requires compatible boot loader (quik, yaboot)
Still defaults to Toolbox boot without intervention

BootX Boot Loader

The most common solution for running Linux on Old World ROM systems:

Mac OS application: Runs from within System 7/8/9
Kernel loading: Loads Linux kernel and initrd into memory
Hardware takeover: Disables Mac OS and transfers control to Linux
System extension option: Can intercept boot process automatically

A/UX Compatibility

Apple's Unix implementation required special consideration:

Mac OS dependency: A/UX required Mac OS ROM Toolbox
Modified boot sequence: Special boot blocks load A/UX kernel
Toolbox emulation: A/UX provided Mac OS compatibility layer
Hardware requirements: Only specific 68030/040 models supported

Hardware Identification

Distinguishing Features

Key characteristics that identify Old World ROM systems:

Physical Indicators:

No built-in USB ports: The definitive identifier (except PowerBook G3 Lombard)
ADB ports: Apple Desktop Bus for keyboard/mouse
Serial ports: RS-232/422 for printers and modems
SCSI ports: Either DB-25 or HDI-30 connectors
Beige or platinum cases: Pre-translucent design era

Technical Indicators:

Boot chime timing: Immediate on power-on (New World has delay)
Maximum Mac OS version: Generally limited to Mac OS 9.1 or earlier
Mac OS X support: Only Beige G3 and PowerBook G3 Wallstreet officially supported

Model Categories

68000 Family (1984-1994):

Compact Macs: 128K through Classic II
Modular Macs: Mac II family, Quadra series
PowerBooks: 100 series through 500 series
All boot directly to Toolbox

NuBus Power Macintosh (1994-1995):

Power Macintosh 6100, 7100, 8100
No Open Firmware present
Direct Toolbox boot only

PCI Power Macintosh (1995-1998):

Power Macintosh 7200, 7500, 7600, 8500, 9500, 9600
Beige Power Macintosh G3
PowerBook G3 Series (Wallstreet/PDQ)
Limited Open Firmware 1.0.5-2.4

ROM Modifications and Development

ROM SIMM Modules

Many Old World ROM systems use socketed ROM modules:

72-pin SIMMs: Similar to RAM but containing ROM/EPROM chips
Capacity options: 1MB, 2MB, 4MB depending on system
Update capability: Apple could ship ROM updates as replacement modules
Third-party modifications: Enthusiasts created custom ROMs with patches

Development and Debug Features

Apple engineering samples included special capabilities:

ROM SIMM sockets with VPP: Voltage for programming EPROMs in-system
Debug ROM versions: Additional diagnostic output and breakpoints
Dual ROM sockets: Switch between production and development ROMs
Serial console output: Diagnostic messages during boot

Common ROM Patches

The enthusiast community developed various ROM modifications:

Memory test bypass: Significantly faster boot times
Checksum disable: Allow further ROM modifications
Boot device patches: Support for non-standard boot devices
Gestalt ID changes: Enable features on lower-end models

Transition to New World ROM

Architectural Changes

The New World ROM architecture introduced fundamental changes:

ROM in RAM: Toolbox loaded from disk into RAM
Open Firmware 3.0: Full-featured IEEE-1275 implementation
Reduced ROM size: Only 1MB boot ROM vs 4MB Old World
Flexible updates: Toolbox updates via software instead of hardware

Timeline

August 1998: iMac introduces New World ROM
October 1998: iBook continues New World adoption
January 1999: Blue & White Power Mac G3 brings New World to towers
May 1999: PowerBook G3 (Bronze/Lombard) - last PowerBook transition
1999-2001: All new Macs use New World ROM architecture

Compatibility Bridge

The Mac OS ROM file provided compatibility:

Location: System Folder on startup disk
Contents: Toolbox code previously in physical ROM
Loading: Open Firmware loads file into RAM at boot
Updates: New versions distributed with Mac OS updates

Technical Specifications

ROM Addressing

Old World ROM systems map ROM at specific addresses:

68k Systems:

Physical location: Typically $400000-$4FFFFF (varies by size)
Boot overlay: ROM temporarily mapped to $000000 during POST
Vector table: Exception vectors copied from ROM to RAM

PowerPC Systems:

Physical location: $FFC00000-$FFFFFFFF (4MB window)
Exception vectors: PowerPC vectors at $FFF00000
68k emulation space: Virtual 68k addresses mapped by emulator

Performance Characteristics

ROM access speeds varied by generation:

68000-68020: 150-250ns ROM chips, no wait states
68030-68040: 120-150ns ROM, possible cache hits
PowerPC 601-604: 70-120ns ROM, instruction cache crucial
PowerPC G3: 60-70ns ROM, large L2 cache mitigates slow ROM

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