File:Atari XEP80 schematic sheet 1 (Jerzy Sobola redraw).jpg
Summary
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Redrawn schematic of the Atari XEP80, "XEP80 Atari Interface", sheet 1 of 3, drawn by Jerzy Sobola and dated 5 August 2000. It shows the NS405 terminal management processor (U4) with its 12 MHz crystal, the 2364 program ROM (U2), the 6264 static RAM (U7), the 2764 character ROM (U12), the parallel port latch, the joystick connector, the video output stage and the 9 V DC input with power switch SW1 and 7805 regulator U14. This is a community redraw, not an Atari drawing.
Source
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AtariWiki, page "XEP80", section "Diagrams", attachment Atari_XEP80_diagram1.jpg, retrieved 2026-10-06.
Author
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Jerzy Sobola (drawing); published on AtariWiki.
Licence
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AtariWiki states that its content is licensed under a Creative Commons Share Alike licence unless otherwise noted; no other licence is given for this drawing. The circuit is Atari's design.
File history
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| Date/Time | Thumbnail | Dimensions | User | Comment | |
|---|---|---|---|---|---|
| current | 12:06, 6 October 2026 | | 1,600 × 711 (493 KB) | Josh (talk | contribs) | Upload: Atari XEP80 schematic sheet 1 (Jerzy Sobola redraw).jpg |
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