Editing IBM PALM processor (section)

== I/O Architecture ==

The I/O bus carries '''4 X-select lines and 4 Y-select lines'''; exactly one X and one Y must be active for a valid device address. This 4 × 4 matrix gives 16 possible device addresses, of which the following are defined in the 5110:

{| class="wikitable styled-table" style="width:70%; text-align:center;"
|+'''PALM I/O device addresses (5110 / 5120; 5100 mostly compatible)'''
! Address !! Device
|-
| 0 || Graphics / processor
|-
| 1 || Common + Language ROS (APL / BASIC interpreters)
|-
| 2 || Executable ROS (monitor / diagnostics)
|-
| 3 || Diskette Sort
|-
| 4 || Keyboard
|-
| 5 || Printer
|-
| 6 || BSCA (Binary Synchronous Communications Adapter)
|-
| 7 || Parallel I/O
|-
| 8 || Async / Serial I/O
|-
| 9 || (unused on some configurations)
|-
| A || Serial I/O (BASIC)
|-
| B || (unused)
|-
| C || Print-Plot (BASIC)
|-
| D || Diskette adapter (5114 control)
|-
| E || Tape drive
|-
| F || Reset I/O
|}

The I/O bus is '''open-collector and daisy-chained''', terminated by a 300 Ω pull-up or an IBM terminator box on the last card. Transfers are handshaked: '''Put Strobe''' validates a byte on Bus Out (to peripheral); '''Get Strobe''' validates a byte on Bus In (from peripheral); '''Control Strobe''' identifies a CTL byte as a command rather than data; '''Op Code E''' is decoded directly from the STAT opcode for non-data transfers.

A '''parity error on the storage R/W bus''' or '''an invalid X/Y device-address pattern''' triggers '''Machine Check''', which halts the processor unless a jumper on the backplane is removed; the front-panel '''PROCESS CHECK''' lamp illuminates.