Editing IBM PS/2 Model 25 (section)

== Architecture ==

=== Model 25 (8086) planar ===

The Model 25 8086 planar uses an Intel 8086-2 CPU at '''8 MHz, zero wait states''', with a socket at ZM1 (sic — '''not Uxx''', per the IBM planar silkscreen) for an optional '''Intel 8087''' math coprocessor. The chip complement is:

* '''Intel 8086-2''' (CPU) at 8 MHz.
* '''IBM 72X8202 / 72X8203 / 72X8206''' &mdash; three IBM-fabricated PS/2 gate-array support chips (CPU/bus support, planar I/O glue, video).
* '''Intel P8253-5''' &mdash; programmable interval timer (system tick, refresh, speaker), at U8.
* '''Seiko Epson SLA64030J2L''' &mdash; clock generator / chip-set support (U11).
* '''Seiko Epson SLA6330J1C''' &mdash; chip-set support (U15).
* '''NEC D765AC-2''' &mdash; floppy disk controller, at U18.
* '''Siemens 8237A''' &mdash; DMA controller, at U19. (One 8237A on the Model 25, unlike the AT's pair.)
* '''National Semiconductor NS8250AV''' &mdash; UART for the serial port, at U27.
* '''Inmos IMSG171P''' &mdash; video RAMDAC for the integrated MCGA.
* '''ROM BIOS''' &mdash; two 32 KB EPROMs in sockets U13/U17 (also marked U10/U20 on some silkscreen revisions), 64 KB total, splitting CBIOS (Compatible BIOS for backward compatibility with PC DOS) and ABIOS (Advanced BIOS for OS/2).
* '''Sony CXK5864BM-12L''' &mdash; 8 KB static RAM, used for video character generator and BIOS work area, at U38.
* DRAM: NEC D4164C-10 chips (×4) at U16/U33/U34/U35 plus OKI M3764A-15 chips at U44 and ZM1, giving 512 KB on-planar with parity. Expansion uses an IBM-pinout 30-pin DIP/SMK RAM module for 128 KB to reach 640 KB.
* Crystals: '''Y1 = 14.318 18 MHz''' (software clock); '''Y2 = 25.175 MHz''' (video pixel clock); '''Y3 = 48.0 MHz''' (CPU/system clock master, divided by 6 for the 8086).
* '''F1''' fuse on the planar protects the keyboard/mouse +5 V rail.
* The 8086 Model 25 has '''no hardware real-time clock''' &mdash; date and time must be set manually from DOS at each boot. (The Model 25 286 and 25 SX both have a hardware RTC backed by a battery.)

The Model 25 and the Model 30 share substantially the same planar layout; many sources confirm that an 8525 8086 planar will physically and electrically swap with a 8530 planar.

=== Model 25 286 planar ===

The Model 25 286 planar uses an Intel 80286 at '''10 MHz with 1 wait state to system memory''' and a '''VLSI VL82C100 / VL82C101 / VL82C102 / VL82C103 / VL82C104''' chipset (the "Popular AT" PC/AT-compatible chipset by VLSI). The system supports up to 4 MB of RAM on '''two 30-pin "MMK" parity SIMM''' sockets (J9/J10) with a proprietary IBM pinout, and includes a '''VGA''' graphics subsystem driven by the IBM 15F6864 VGA gate array (ZM18) and the '''Inmos IMSG171P-35''' RAMDAC (ZM23).

Additional planar I/O on the Model 25 286:
* '''VLSI VL16C451''' &mdash; integrated UART + parallel port (ZM9).
* '''NEC D765BC''' &mdash; floppy disk controller (ZM19).
* '''Intel 8042''' &mdash; keyboard controller (ZM33), supporting the PS/2 keyboard and pointing device (PS/2 mouse) ports.
* '''27F4094 DISKGA''' &mdash; IBM disk/diskette gate array (ZM14), supporting the proprietary PS/2 single-cable floppy interface and the optional ST-506 hard drive interface.
* Crystals: Y1 = 14.318 MHz; Y2 = 25.175 MHz; Y3 = 20.322 MHz; Y4 = 20.0 MHz; Y5 = 48.0 MHz.
* The 286 planar adds a '''4-pin auxiliary power connector''' to feed the 16-bit ISA bus (not present on the 8086 Model 25), and a '''math coprocessor socket''' at ZM1 for an 80287.
* Battery-backed CMOS via the MC146818-equivalent RTC integrated into the VLSI chipset.

=== Model 25 SX planar ===

The Model 25 SX planar uses an Intel 80386SX (typically a 386SX-16 or a 386SX-20 underclocked to 16 MHz) at U2, with an '''80387SX''' socket at U5. The chipset is '''VLSI VL82C304 / VL82C305-FC'''. Additional features:

* '''Intel 82077AA''' (U25) &mdash; floppy controller, supporting 1.44 MB diskettes natively.
* '''IBM SVGA gate array 84F7985''' (U42) with '''Toshiba TC511665BZ-80''' video RAM at U43/U44/U51/U54, driven by an IMSG171P RAMDAC at U45.
* '''Hitachi HM514900JP8''' &mdash; system RAM, with additional 30-pin socket pads at U33/U32/U48/U49 populated on non-K (non-school) variants.
* '''On-board IDE''' hard disk interface at J10 (the Model 25 and 25 286 use a proprietary ST-506 / PS/2 floppy interface; the 25 SX uses standard 40-pin IDE).
* On the K01 and L02 submodels, a second flipside ISA slot on the riser card carries an Ethernet or Token Ring card aligned to a rear-panel cutout.