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Acorn Archimedes A500 Documentation
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== Fast A500 application note == Acorn's ''Application Note: Fast A500's'', issue 1.4 (replacing 1.3), dated 12 December 1988, by Mike Muller, marked "draft - not for publication": five pages with a text layer.<ref name="fast">Muller, Mike. ''Application Note: Fast A500's'', issue 1.4, Acorn Computers, 12 December 1988 (draft). Hosted on this wiki: [[:File:Acorn Fast A500 Application Note.pdf]].</ref> It describes a two-PAL circuit, soldered on top of IC18 and IC28 with four tracks cut, that lets the A500's ARM and memory run faster than its 8 MHz I/O system. It records that many A500s ran at 14/7:8 MHz on the bench but became unreliable when warm, that 12/6:8 MHz was reliable, and that the EPROMs fail first, so the ROM access time should be slowed from 200 ns to 325 ns at 8 MHz.<ref name="fast" /> Chris Whytehead's second A500 appears to carry this modification.<ref name="chris" /> Download: [[:File:Acorn Fast A500 Application Note.pdf|Acorn Fast A500 Application Note.pdf]]
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