Acorn Archimedes A500 Documentation

The Acorn A500 documentation hosted here is two internal Acorn documents for the Acorn Archimedes A500 development machine: the draft A500 Hardware Guide and the Fast A500 application note. Both come from Chris's Acorns.

A500 Hardware Guide

The A500 Hardware Guide is issue 0.0, marked "draft - not for publication", with the part number left as "???,???" and the ISBN blank. The cover date is printed as "10 November 1916"; the copyright line reads 1986. The scan has 79 pages with a text layer. Chris Whytehead describes it as a work in progress, and warns that A500s were modified so much inside Acorn that it may not match a particular machine.

Contents

A500 Hardware Guide contents (printed page numbers)

Chapter	Page
1 Introduction and feature list	2
2 General circuit description	4
3 to 5 Memory, video and sound systems	5-8
6 The I/O system and memory maps	9-13
7 Keyboard; 8 PCB general layout	14-16
9 Detailed hardware description: RAM, video, latches, serial line, I2C clock and RAM, Econet, floppy and Winchester discs, keyboard interface, reset, podules and backplane, fan, RFI	17-23
10 Programming details: IOC registers, latches, interrupts, control port, counters	24-38
11 Reset and power-on	39-40
12 Mechanical	41
13 Main PCB connectors, links and test points	42-51
14 A500 parts list	52-56
15 Modifications (Issue B boards)	57
Appendices A to D: keyboard protocol, the A500 keyboard and its parts, key legends, podules	58 onwards

What it settles

• The A500 is described as "a high performance personal workstation intended for software development of future Acorn products", built on the ARM, MEMC, VIDC and IOC.
• Main board: 32 one-megabit DRAMs (120 ns or faster for an 8 MHz ARM); FDC9793 or FDC1793 floppy controller (IC34) with an FDC9216B data separator; a real-time clock (IC22) and 256 bytes of CMOS RAM (IC23) on the I²C bus, for which the guide refers to the PCF8573 and PCF8570 data sheets,, kept alive by two dry cells that can be changed with the power on.
• Links: LK1 selects the 20 or 24 MHz clock, LK3 and LK4 the 256 Kbit or 1 Mbit DRAMs, LK5 is made for a 3 µm ARM and broken for a 2 µm ARM, LK12 must be made for a WD1793, LK14 and LK15 select how the floppy drive is powered.
• Power: the A500 uses the BBC Master 128 power supply, which the guide calls "a compromise and probably inadequate for a production machine"; it can run one low-power 3.5-inch Winchester, and the guide notes that the 12 V feed to the keyboard is not decoupled.
• The keyboard: a 6500/11 microcontroller, a 74LS145 and a 74HCT14, an LM386 audio amplifier and an LM7805 regulator deriving +5 V from +12 V; its electrolytics are C1 and C8, 10 µF 16 V, and C12, 470 µF 6.3 V.
• Eight modifications needed on Issue B main boards, including smoothing the +12 V and +5 V feeds to the floppy drive and an Econet collision detect change.

What it does not contain

• The main board parts list (section 14.1), the battery and fan entries (14.3.3, 14.4), the whole mechanical chapter (12.1 to 12.7, including "Changing the batteries") and the power connection pinout (13.32) are headings with no content.
• No fault finding.

Download: Acorn A500 Hardware Guide (draft).pdf

Fast A500 application note

Acorn's Application Note: Fast A500's, issue 1.4 (replacing 1.3), dated 12 December 1988, by Mike Muller, marked "draft - not for publication": five pages with a text layer. It describes a two-PAL circuit, soldered on top of IC18 and IC28 with four tracks cut, that lets the A500's ARM and memory run faster than its 8 MHz I/O system. It records that many A500s ran at 14/7:8 MHz on the bench but became unreliable when warm, that 12/6:8 MHz was reliable, and that the EPROMs fail first, so the ROM access time should be slowed from 200 ns to 325 ns at 8 MHz. Chris Whytehead's second A500 appears to carry this modification.

Download: Acorn Fast A500 Application Note.pdf

Pages that cite these documents

• Acorn Archimedes A500