Acorn Z80 Second Processor

Acorn Z80 Second Processor

The Z80 Second Processor in its "cheese wedge" case (photo: Chris Whytehead, CC BY-SA 3.0)
Specifications
Manufacturer	Acorn Computers
Type	Tube second processor for the BBC Micro Model B
Released	1984
Intro price	£299
CPU	Z80B at 6 MHz
Memory	64 KB DRAM (eight 8264 chips)
Storage	—
Display	—
Sound	—
ROM	4 KB boot ("shadow") ROM
Power	Internal linear supply, 216 to 264 V AC, 14 W
Dimensions	About 205 × 345 mm
OS / Firmware	CP/M 2.2 (loaded from disc)
Model no.	ANC04

The Acorn Z80 Second Processor is an external processor unit that lets a BBC Micro Model B run CP/M 2.2. It connects to the Tube interface under the computer and contains a 6 MHz Z80B, 64 KB of RAM, a 4 KB boot ROM and its own mains power supply, in the same case as the Acorn 6502 Second Processor. The BBC Micro handles the screen, keyboard, discs and printer; the Z80 runs CP/M and the user's programs. Acorn's sales code for it was ANC04.

The unit was sold as a business pack. It came with a DNFS ROM for the BBC Micro, seven floppy discs, function key reminder cards and a licence, and for machines with an operating system older than 1.2 a voucher for a replacement MOS ROM. The software included the MemoPlan word processor, FilePlan database, GraphPlan spreadsheet, the Accountant accounts package, the Nucleus system generator, Z80 BBC BASIC, Professional BASIC and CIS COBOL with Animator and Forms2. Wikipedia gives the launch price as £299; Acorn User's review of June 1984 called it £300 and put the bundle's value at about £3,000.

Hardware

Main board 209,000 issue 3, with the Ferranti Tube ULA at the left beside the ribbon cable and the Z80B in the middle (photo: Chris Whytehead, CC BY-SA 3.0)

The Z80B runs at 6 MHz. A 12 MHz crystal (X1) drives an oscillator built from IC24, and IC17A divides it by two; Q1, a 2N3906, gives the clock line an active pull-up because the Z80 clock input draws a high current. All memory and I/O cycles run at full speed except reads from the boot ROM, which get one wait state. Chris Whytehead's board is marked 209,000 issue 3.

Main board ICs (service manual parts list and circuit description)

IC	Part	Function
IC1	Tube ULA (201,605)	Interface between the BBC Micro (host) and the Z80 (parasite); socketed
IC2	Z80B (700,080)	Processor; socketed
IC3	Boot ROM (201,644)	4 KB shadow ROM, a 2732A on the circuit diagram; socketed
IC4, IC5	81LS95 / 74LS795	Column and row address buffers for the DRAMs
IC6 to IC13	8264	64 Kbit DRAMs, 64 KB in total
IC14	74LS123	Reset pulse monostable
IC15	74S74 / 74F74	ROM latch (IC15A) and reset synchroniser (IC15B)
IC16 to IC18, IC30	74LS74	Wait state generator, clock divider, DRAM timing and desynchronising logic
IC19	74LS132	Power-up reset and shaped clock for the NMI logic
IC24	74S04	12 MHz oscillator
IC26, IC27	74LS260, 74LS133	Detect an instruction fetch from 0066H (NMISERV)
IC28	81LS95 / 74LS795	Supplies the interrupt vector byte FEH

The rest of the logic is 74LS11 (IC20), 74LS00 (IC21), 74LS32 (IC22, IC23 and IC29) and 74LS04 (IC25).

Boot ROM

At power-on or reset, latch IC15A maps the 4 KB ROM into the memory map. The Z80 runs the first instructions from ROM, copies it into high RAM, and the first instruction fetch above 8000H clears the latch so the machine runs entirely from RAM. The host uses the Z80's NMI for disc transfers, but the Z80's NMI address 0066H falls inside CP/M's default file control block. IC26 and IC27 therefore detect an instruction fetch from 0066H and bring the ROM back in, and the ROM holds a jump to the place CP/M expects. The boot ROM also puts the Z80 into interrupt mode 2; IC28 supplies FEH as the vector, so maskable interrupts from the Tube go through FFFEH.

The Z80's own refresh cycles keep the DRAMs refreshed; there is no separate refresh counter.

Test points

Test points on the Z80 board (service manual section 6.1)

TP	Signal	What it shows
TP1	CLOCK	6 MHz clock to Z80 pin 6
TP2	ROM	ROM select; low for about 0.25 s after BREAK
TP3	M1	Instruction fetch cycles, also used in interrupt handling
TP4	MREQ	Memory access
TP5	PCS	Parasite chip select to the Tube, through the desynchronising logic
TP6	HCS	Host chip select to the Tube
TP7	WAIT	ROM reads and simultaneous HCS/PCS events
TP8	RAS	Row address strobe, present on every memory and refresh cycle
TP9	CAS	Column address strobe, absent during refresh

Power supply

Power supply board and transformer at the front, Z80 board behind (photo: Chris Whytehead, CC BY-SA 3.0)

Acorn rates the supply at 216 to 264 V AC, 47 to 63 Hz, 14 W, with a maximum of 1 A at +5 V. It is the same linear design as the 6502 Second Processor's: a transformer (T1, VT30018) with 11DQ04 rectifiers D1 and D2, a 4700 µF 16 V reservoir C1, a TIP42 pass transistor TR1 driven by two BC182s, a 3.9 V zener reference, a 100 ohm trimmer VR1 marked "set 5V", a 47 µF 35 V output capacitor C5 and a 1 A fuse F1 on the output. The rear fuse is a 20 × 5 mm 250 mA type T (slow blow) part, reached by unscrewing the round slotted cover on the back panel. The moulded mains plug takes a 3 A fuse.

Power supply circuit diagram (service manual p. 45)

The Z80 board protects itself. FS1, a 1 A fast-blow fuse, guards against overcurrent. D3 (BZY88 C5V1) and R11 (390 ohms) trigger thyristor TH1 (C122F) when the rail rises above about 6.1 V; TH1 can draw 8 A and blows FS1. A blown FS1 means a short on the board or a supply giving too high a voltage.

Warning: the transformer primary, mains switch and rear fuse holder carry mains voltage. Unplug the unit before removing the lid.

Fitting and compatibility

Acorn's requirements are a BBC Micro Model B with a disc interface, operating system 1.20, the DNFS ROM supplied in the pack, a dual 80-track disc drive (Acorn's 800K dual drive or equivalent), a monitor and a printer. The Preparing the BBC Microcomputer leaflet asks for MOS 1.20 or later and a DNFS ROM giving DFS 1.20 and NFS 3.50 or later.

1. Type *HELP on the BBC Micro and look for OS 1.20, DFS 1.20 and NFS 3.50. Lower numbers mean the ROMs need replacing. If no DFS line appears at all, Acorn says the machine is unlikely to be able to take the whole Z80 pack.
2. With the power off, fit the DNFS ROM in place of the separate DFS and NFS ROMs. It must be the rightmost filing system ROM fitted, or the Z80 will not work properly. The replacement MOS 1.20 ROM, marked with a number ending B04, goes in the leftmost socket.
3. Stand the second processor to the right of the BBC Micro and plug its ribbon cable into the socket marked Tube under the computer, with the small v-shaped mark to the right. The grey clips click down when it is home.
4. Switch on the BBC Micro and the second processor and press BREAK. The screen should show "Acorn TUBE Z80 64K 1.0", the last figure being the boot ROM version.
5. Put master disc 1 in drive A and press CTRL BREAK. CP/M loads and shows "Acorn CP/M 2.2 - BIOS 1.0" and the A> prompt.

To use the BBC Micro on its own, switch the second processor off and press BREAK. With the Z80 running, BBC BASIC keywords are no longer understood. Under CP/M each disc is treated as one continuous space of 160 tracks, about 400 KB, instead of two separate sides.

Disassembly

1. Disconnect the unit from the BBC Micro and from the mains.
2. Undo the three lid screws: two at the top of the back panel and one underneath, nearest the front, midway between the two rubber feet. Lift the lid off.
3. The transformer and power supply board are held by six screws. Acorn recommends leaving them in place unless necessary.
4. To remove the Z80 board, pull off the two Faston tabs from the power supply (brown +5 V, black 0 V) and remove the four board screws.

Fault finding

Acorn groups Z80 Second Processor failures into five conditions. ICs 1 to 3 are socketed and can be swapped easily.

Fault conditions (service manual section 6.2)

Symptom	Probable cause	Action
"BBC Computer 32K" start-up message with the Z80 switched on	No power to the second processor, a misconnected or damaged plug, or a damaged ribbon cable	Check the rear fuse, switch and leads; check the cable and both connectors
"Acorn TUBE Z80 64K" appears, but no response to the keyboard	Boot ROM has been copied and the system has then crashed: incompatible or failed DNFS or boot ROM, a Tube register fault, a Z80 fault or a DRAM error	Replace IC1, IC2 and IC3 in turn. Check again once warm, and use freezer spray to find a temperature-sensitive part
Flashing cursor at the top left of an otherwise blank screen	Total failure; most faults show this way	Work through the circuit checks below, starting with the power supply
Works until BREAK is pressed, then fails	Reset circuit: IC15B, IC14 and the parts around them	Check the reset path (below)
BBC Micro fails when the second processor is plugged into the Tube	Misconnected or damaged plugs or sockets, a damaged ribbon cable, a failed Tube ULA, or a failed IC29 on the Z80 board	Check the cable and connectors, then IC1 and IC29

Acorn's checks

1. Check the 250 mA type T rear fuse, the leads and the mains switch.
2. Disconnect the brown and black supply leads from the Z80 board and connect a 10 ohm 2.5 W resistor across them. The service manual text gives 4.95 to 5.25 V with no more than 50 mV of noise (0 to 50 MHz); the power supply flowchart gives 4.9 to 5.1 V. If the voltage is out of limits, set 5 V exactly with the trimmer through the hole in the power supply board. If 5 V cannot be reached, or the noise is too high, replace the supply.
3. Reconnect the leads and measure the current drawn by the board: 600 to 800 mA (the flowchart says 700 mA ± 100 mA). Zero current means an open circuit, so check FS1, the connectors and the tracks. A blown fuse means a short on the board. Too much current with the voltage above 5.25 V means the trimmer needs setting; with the voltage in limits, one or more components is faulty, so switch off and feel for the hot one, taking care not to get burnt.
4. Check the Tube ULA supplies, which come from both machines. With only the BBC Micro switched on, IC1 pin 4 should be at about 5 V against pins 1 and 5; if not, check the ribbon cable and connectors. With only the second processor switched on, pin 2 should be at 5 V and pin 3 between 2 and 3 V against pins 1 and 5; if not, check R2 (12 ohms, 1 W) and L1.
5. Clock: 12 MHz at IC22D pin 13 (as printed in the manual), then a clean 6 MHz square wave at IC17A pin 9 and from Q1 to Z80 pin 6. If the oscillator is dead, check X1, the resistors and IC24D and E. If the delayed clock at IC19D pin 11 is missing, check C9 and R9.
6. Power-up reset: R1, C2 and D1 give a low-to-high transition of about 0.1 s at IC19C pin 9. After BREAK, PRST from Tube pin 37 is clocked through IC15B by M1 and triggers IC14, whose pulse is set by R7 and C8. The reset then reaches Z80 pin 26 and the ROM latch IC15A. A halted CPU gives no M1, so BREAK will not work unless the power-up reset has succeeded.
7. ROM and wait states: after BREAK, TP2 should go low for about 0.25 s, with WAIT (TP7) going low and then high. The ROM select must reach IC3 pin 18, and IC3 pin 20 is enabled only when MREQ and RD are both low. The first fetch from high memory with A15 high clears IC15A through IC20B and IC24C.
8. RAS and CAS: trace them back from the DRAMs. RAS should always be present at TP8 and inverted at IC21A pin 3; it comes from both IC18A and IC17B, and needs a running CPU. CAS also depends on the memory decode through IC23B, IC20C and IC23C, and is disabled by IC23D when the ROM is selected.
9. Tube handshake: after power-up, PCS should be active at IC1 pin 18. If not, suspect IC1, IC29, the ribbon cable or the host. After BREAK, check IC22A and IC1 pin 21, then the desynchronising logic IC30.
10. NMI: when Z80 pin 17 (NMI) goes active, the address lines should show a fetch from 0066H, decoded by IC26 and IC27 into NMISERV at IC27 pin 9. If this fails, the second processor cannot use the discs. Replace IC26 and IC27 if needed.
11. DRAMs (IC6 to IC13): check +5 V at pin 8 and 0 V at pin 16 of each, that RAS, CAS and W reach every chip, that IC4 and IC5 are enabled at pins 1 and 19, and that no address or data lines are shorted together.

The IC14 reset pulse is given as about 4 µs in the circuit description and about 10 µs in the fault-finding section.

Capacitors

Polarised capacitors (service manual pp. 45 and 49)

Board	Ref	Value	Type	Acorn part
Power supply	C1	4700 µF 16 V	Aluminium electrolytic, reservoir	(assembly 831,000)
Power supply	C5	47 µF 35 V	Aluminium electrolytic, output	(assembly 831,000)
Main board	C2	100 µF 6.3 V	Aluminium electrolytic, power-up reset timing with R1	620,101
Main board	C3	47 µF 10 V	Aluminium electrolytic, +5 V supply	621,470
Main board	C10	10 µF 35 V	Tantalum	613,101

The other main board capacitors are ceramics: C4 10 nF, C5 and C7 33 pF, C8 1000 pF (the reset monostable with R7), C9 56 pF (the NMI clock delay with R9), C11 100 nF, which absorbs spikes on the overvoltage sense line, and 33 decouplers of nominally 47 nF. The power supply also has C6, 22 nF. Acorn's power supply flowchart measures the voltage across C3 when tracing a short, and its reset check names R1, C2 and D1 if the 0.1 s power-up transition is wrong. Replace C1 and C5 if the supply shows ripple or will not hold 5 V into the 10 ohm test load. See Capacitor Failure Symptoms.

Documentation

• Acorn Z80 Second Processor Documentation: the service manual (0409,015), the user guide (409010), the Preparing the BBC Microcomputer leaflet (409011) and the AMP 06 sales leaflet.
• Chris's Acorns has the function key cards and Acorn User's April 1985 comparison with Torch's ZEP100.

Related pages

• BBC Micro Model A/B
• BBC Micro Model A/B Troubleshooting Guide
• Acorn 6502 Second Processor, which uses the same case and power supply
• Acorn 32016 Second Processor