Editing Acorn ARM Evaluation System

{{Infobox computer
| name         = Acorn ARM Evaluation System
| image        = [[File:Acorn ARM Evaluation System.jpg|260px|frameless]]
| caption      = The ARM Evaluation System in its "cheese wedge" case (photo: The Centre for Computing History)
| manufacturer = Acorn Computers (Acorn OEM Products)
| type         = Tube second processor for the [[BBC Micro Model A/B|BBC Micro]] and BBC Master
| release date = July 1986
| price        = £4,500 ex VAT
| cpu          = Acorn ARM1 (3 µm CMOS)
| memory       = 2 MB on the processor board, 4 MB with the memory board
| rom          = Bootstrap ROM (IC19)
| storage      = Uses the host's discs; a Winchester of at least 10 MB recommended
| os           = Host BBC MOS with Acorn's ARM system software
| power        = Internal mains supply, 240 V 50 Hz, 1.6 A fuse
}}
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The '''Acorn ARM Evaluation System''' is a second processor for the BBC Micro and BBC Master built around the ARM1, the first ARM processor. It sits in the cream "cheese wedge" case of Acorn's other Tube processors, with its own mains supply and up to 4 MB of memory, and connects to the host's Tube socket; the host BBC Micro handles the screen, keyboard and discs. Acorn OEM Products sold it from July 1986 at £4,500 plus VAT, with a set of compilers and tools, so that developers and researchers outside Acorn could try the ARM.<ref name="pr">Acorn Computers, press release, "Acorn Computers announce the availability of an evaluation system for their single chip, 32-bit reduced instruction set computer - the ARM", 7 July 1986. Hosted on this wiki: [[:File:Acorn ARM Evaluation System press release (July 1986).pdf]]. Two versions announced, one for BBC and Master Series micros and one for IBM PC, AT and compatibles; five high-level languages, an assembler and tools; ARM averaging 4 MIPS with a two-phase 8 MHz clock, 44 basic instructions, 25 partly overlapping 32-bit registers; VLSI Technology to manufacture the chip set; the BBC version available immediately at £4,500 ex VAT, the PC version in the fourth quarter of 1986.</ref><ref name="hw">Acorn Computers, ''ARM hardware reference manual'', ARM Evaluation System, Acorn OEM Products, part number 0448,006, issue 1.0, 4 August 1986. Hosted on this wiki: [[:File:Acorn ARM Evaluation System Hardware Reference Manual.pdf]]; described on [[Acorn ARM Evaluation System Documentation]]. Chapter 1 (features, performance), chapter 2 (physical description, power), chapter 5 (the co-processor board and its ICs).</ref> Chris Whytehead notes that the ARM1, which has no multiply instruction, first appeared in the ARM Evaluation System.<ref name="chrisarc">Whytehead, Chris. [https://chrisacorns.computinghistory.org.uk/Computers/Archimedes.html "Archimedes"], Chris's Acorns, The Centre for Computing History (retrieved 2026-10-02). The ARM first appeared as the ARM1, without a multiply instruction, in the ARM Evaluation System, a BBC second processor in the standard "cheese box"; listed as wanted.</ref>

== System ==

{| class="wikitable styled-table" style="width:70%; text-align:left;"
|+'''A complete ARM evaluation system (Acorn user guide)'''
! Part !! Details
|-
| Host || BBC Model B or BBC Master
|-
| Co-processor || ARM Evaluation System, with a captive cable ending in a 40-way IDC connector for the host's Tube socket
|-
| Discs || Twin double-sided double-density 5.25-inch drive, plus a Winchester of at least 10 MB suggested
|-
| ROMs || DNFS ROM (supplied) for a Model B without Econet or second processor support; ADFS (ANB29) and a 1770 controller (ANB28) if the host lacks them
|-
| Software || Assembler, utilities, TWIN editor, BBC BASIC, LISP, Prolog, Fortran and C, on ADFS discs
|}

Source: ''ARM system user guide''.<ref name="ug">Acorn Computers, ''ARM system user guide'', ARM Evaluation System, Acorn OEM Products, part number 0448,001, issue 1.0, 22 July 1986, pp. 1-6. Hosted on this wiki: [[:File:Acorn ARM Evaluation System User Guide.pdf]].</ref> The hardware carton held the second processor, the DNFS ROM, a TWIN function key card, six system software discs and the terms of sale; the ten manuals came in a separate carton.<ref name="is">Acorn Computers, ''ARM Evaluation System Instruction Sheet'', part number 0448,004, issue 1, 16 June 1986. Hosted on this wiki: [[:File:Acorn ARM Evaluation System Instruction Sheet.pdf]].</ref>

Switch the host and its peripherals on first, then the ARM Evaluation System, then press CTRL and BREAK on the host.<ref name="ug" />

== Hardware ==

[[File:Acorn ARM Evaluation System ARM1 board.jpg|thumb|right|320px|The ARM1 (IC13) on the processor board, silkscreened 0143,000 issue 1 (photo: Peter Howkins, CC BY-SA 3.0)]]

The ARM1 is made in 3 µm double-level metal CMOS on a 50 mm² die and packaged in an 84-pin JEDEC type B leadless ceramic chip carrier. It has a 32-bit data bus, a 26-bit address bus and 25 32-bit registers, runs from a single +5 V supply (absolute maximum 6.0 V) and dissipates about 0.1 W. Acorn's hardware manual gives about 3 MIPS average on the Evaluation System with 150 ns DRAM, and 8 MIPS peak on the first prototype.<ref name="hw" />

The co-processor board is a four-layer PCB carrying the ARM, 2 MB of DRAM and a bootstrap ROM, with a further 2 MB on a daughter board.<ref name="hw" />

{| class="wikitable styled-table" style="width:100%; text-align:left;"
|+'''Co-processor board ICs (ARM hardware reference manual)'''
! IC !! Function
|-
| IC1, IC2 || Timing generators (PAL20L8): processor clocks PHI1 and PHI2, RAM strobes
|-
| IC3 || Clock generator (PAL20L8): divides the crystal oscillator by three to give four overlapping clock phases
|-
| IC8 || Refresh counter chain
|-
| IC9 || State machine (PAL20R8) enabling the timed signals
|-
| IC10 || Transparent latch delaying enables to IC1 and IC2
|-
| IC13 || ARM processor
|-
| IC17 || Tube chip
|-
| IC18 || ROM access state machine (PAL20R8)
|-
| IC19 || ROM
|-
| IC20 to IC22 || Latches building 32-bit words from the ROM
|-
| IC23 to IC150 || 4 MB of RAM
|}

The circuit diagram and the PAL equations are in the hardware reference manual.<ref name="hw" /> The Centre for Computing History's unit has the 2 MB memory expansion board, 0148,001, fitted over the processor board.<ref name="cch">The Centre for Computing History, [https://www.computinghistory.org.uk/det/4617/Acorn-ARM-Evaluation-System/ "Acorn ARM Evaluation System"], exhibit CH4617, donated by Chris Whytehead (retrieved 2026-10-02). Supplied in the standard BBC "cheese wedge" case; connects to the Tube port; the 2 MB memory expansion card (0148,001) fitted; photographs.</ref>

The clock speed is given differently. Acorn's press release says the ARM uses a two-phase 8 MHz clock; Wikipedia's ARM article says the ARM1 parts ran at 6 MHz.<ref name="pr" /><ref name="wparm">[https://en.wikipedia.org/wiki/ARM_architecture_family "ARM architecture family"], Wikipedia (retrieved 2026-10-02). First ARM silicon on 26 April 1985; the ARM1 ran at 6 MHz; its first use was as a BBC Micro second processor for developing the support chips; ARM Evaluation Systems with ARM1 CPUs sold from July 1986 under the Acorn OEM Products name.</ref> The press release's average of 4 MIPS also differs from the hardware manual's measured 3 MIPS.<ref name="pr" /><ref name="hw" />

== Power and safety ==

[[File:Acorn ARM Evaluation System with cover removed.jpg|thumb|right|320px|Cover removed: the mains supply under its warning cover on the left, the processor board with the memory board on top on the right (photo: The Centre for Computing History)]]

The unit has its own mains lead for 240 V 50 Hz, with a mains switch and fuseholder on the rear panel; the fuse is rated 1.6 A. It must be earthed, and the moulded plug takes a 5 A fuse.<ref name="ug" /> The supply sits under a cover labelled "Warning high voltages present under the label".<ref name="cch" /> Unplug the unit before removing its case, and treat the supply's capacitors as charged until measured.

Acorn's documents for the unit give no parts list and no data for its power supply. Faults on the host side (Tube socket, DNFS, discs) are covered by the [[BBC Micro Model A/B Troubleshooting Guide]].

== History ==

The first ARM silicon arrived on 26 April 1985. Its first use was as a second processor for the BBC Micro, inside Acorn, for developing the support chips that became MEMC, VIDC and IOC.<ref name="wparm" /> The [[Acorn Archimedes A500|A500]] development machines that followed also began with ARM1 processors.<ref name="chrisarc" /> Acorn announced the Evaluation System on 7 July 1986 and offered it to developers and researchers; the PC-hosted version was promised for later in 1986.<ref name="pr" /> Wikipedia gives the price as £4,500 plus VAT for fourth-quarter availability;<ref name="wpexp">[https://en.wikipedia.org/wiki/BBC_Micro_expansion_unit "BBC Micro expansion unit"], Wikipedia (retrieved 2026-10-02), section "ARM evaluation system": announced July 1986 for fourth-quarter availability at £4,500 plus VAT; 2 MB or 4 MB of RAM.</ref> Acorn's release gives the BBC version as available immediately and only the PC version for the fourth quarter.<ref name="pr" />

Chris Whytehead lists the ARM Evaluation System as wanted, and says its software can be downloaded from J. G. Harston's mdfs.net.<ref name="chrisarc" /><ref name="oem">Chris's Acorns, [https://chrisacorns.computinghistory.org.uk/docs/Acorn/OEM/OEM.html "Acorn OEM Products"] (retrieved 2026-10-02): the leaflets and manuals for the ARM Evaluation System; the software can be downloaded from J. G. Harston's mdfs.net.</ref>

== Documentation ==

* [[Acorn ARM Evaluation System Documentation]]: the ARM system user guide (0448,001), the ARM hardware reference manual (0448,006), the instruction sheet (0448,004) and the July 1986 press release.

== Related pages ==

* [[Acorn Archimedes A500]]
* [[Acorn 6502 Second Processor]]
* [[Acorn 32016 Second Processor]]
* [[BBC Micro Model A/B]]

== References ==

<references />

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