IBM 5100: Difference between revisions
Deep technical pre-PC IBM page with verified sources (Bitsavers MIM/MAP, Wikipedia, IBM Archives) — honest gap disclosure where IBM did not publish per-board cap values |
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=== PALM Processor === | === PALM Processor === | ||
The 5100's central processor is the '''IBM PALM''' (officially "Put All Logic in Microcode"; some internal documents expand it as "Program All Logic in Microcode") — a 16-bit '''board-level''' processor, not a single-chip microprocessor. The PALM board carries '''13 bipolar gate arrays in square metal-can packages, 3 TTL DIPs, and 1 round metal-can device'''.<ref>https://en.wikipedia.org/wiki/IBM_PALM_processor</ref> The data bus is 16 bits + 2 parity bits, and the PALM directly addresses 64 KB of memory; ROS larger than 64 KB is accessed via bank switching. | The 5100's central processor is the '''[[IBM PALM processor|IBM PALM]]''' (officially "Put All Logic in Microcode"; some internal documents expand it as "Program All Logic in Microcode") — a 16-bit '''board-level''' processor, not a single-chip microprocessor. The PALM board carries '''13 bipolar gate arrays in square metal-can packages, 3 TTL DIPs, and 1 round metal-can device'''.<ref>https://en.wikipedia.org/wiki/IBM_PALM_processor</ref> The data bus is 16 bits + 2 parity bits, and the PALM directly addresses 64 KB of memory; ROS larger than 64 KB is accessed via bank switching. | ||
The PALM cycle time is '''530 ns per 2-byte access''' and the clock runs at '''1.9 MHz'''.<ref>https://en.wikipedia.org/wiki/IBM_5100</ref> IBM called PALM a "microprocessor" only in the sense that it executes '''microcode to implement a higher-level instruction set''' — namely a subset of the IBM System/370 and System/3 instruction sets, just enough to run the unmodified APLSV and System/3 BASIC interpreters in their original object code. | The PALM cycle time is '''530 ns per 2-byte access''' and the clock runs at '''1.9 MHz'''.<ref>https://en.wikipedia.org/wiki/IBM_5100</ref> IBM called PALM a "microprocessor" only in the sense that it executes '''microcode to implement a higher-level instruction set''' — namely a subset of the IBM System/370 and System/3 instruction sets, just enough to run the unmodified APLSV and System/3 BASIC interpreters in their original object code. | ||