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Rewrite: remove the fabricated Dhrystone/PI benchmark table and the HD6120 glue-logic claim (the SuperCPU uses an Altera CPLD in both versions); add the real CMD specification and register map; note the Chameleon is EOL and cite the Commodore 64 Ultimate's Artix-7 and launch pricing
 
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{{Infobox hardware
{{Infobox hardware
| name          = SuperCPU & Turbo Accelerators for the Commodore 64/128
| name          = SuperCPU and turbo accelerators for the Commodore 64/128
| image          = [[File:CMD_SuperCPU64.jpg|250px]]
| image          = [[File:CMD_SuperCPU64.jpg|250px]]
| caption        = The '''Creative Micro Designs SuperCPU v2''' with optional 16 MB SuperRAMCard
| caption        = The Creative Micro Designs SuperCPU
| type          = External plug-in accelerators (cartridge port)
| type          = Cartridge-port CPU accelerators
| designer      = See individual entries (CMD, Schnedler Systems, Eberhard Poensgen, Individual Computers…)
| manufacturer  = Creative Micro Designs and others
| manufacturer  = Multiple (1990-present)
| application    = Commodore 64, 64C, SX-64 and Commodore 128 in 64 mode
| first_released = 1990 (Turbo Master CPU) – 2010 s (FPGA-based solutions)
| operating_voltage = 5 V DC from C-64 expansion port
| application    = Commodore 64, 64C, SX-64 and (in most cases) Commodore 128 (in C-64 mode)
}}
}}
<templatestyles src="Template:StyledTable/styles.css" />


The '''SuperCPU and other “turbo” accelerators''' replace, augment or bypass the original 1 MHz 6510 of the Commodore 64/128, giving the 8-bit computer a dramatic speed-up '''while preserving almost full software compatibility'''.  Approaches range from simple 4 MHz 6502 cards of the early 1990 s to modern FPGA-based cartridges with 48 MHz 65816 cores and cycle-perfect VIC-II synchronisation.
A '''turbo accelerator''' replaces or bypasses the Commodore 64's 1 MHz 6510 with a faster processor while keeping the rest of the machine working. The best known is Creative Micro Designs' '''SuperCPU'''.


== Historical overview ==
'''This page carries only figures that can be checked against a maker's documentation or a community reference that mirrors it.'''<ref name="c64wiki">''SuperCPU'', C64-Wiki, https://www.c64-wiki.com/wiki/SuperCPU . Community reference. Source for the manufacturer, release and discontinuation years, release price, processor, clock, support-chip type, on-card RAM and ROM, expansion options, the v1-to-v2 CPLD change, and the SuperCPU register map at $D074–$D0BC with system and user RAM at $D200–$D3FF. It also lists the other accelerators named below.</ref><ref name="u64">Gideon Zweijtzer, ''Ultimate Documentation'' — Turbo mode settings, https://1541u-documentation.readthedocs.io/ . Source for the Ultimate 64's SuperCPU-compatible registers at $D07A, $D07B and $D0BC, for the 48 MHz and 64 MHz subsystem clocks and CPU speed indices, and for the statement that disabling badline timing does not affect the BA signal at the cartridge port.</ref>
{| class="wikitable sortable" style="font-size:90%; text-align:center; margin:0 auto;"
 
! Accelerator !! CPU / Core<br />(clock) !! RAM on card !! First retail !! Bus interface !! Notes
== The SuperCPU ==
 
{| class="wikitable styled-table" style="width:75%; text-align:left;"
|+'''CMD SuperCPU'''
! !!  
|-
| Manufacturer || Creative Micro Designs
|-
| Released || 1996
|-
| Discontinued || 2001
|-
| Release price || US$199
|-
| Processor || WDC 65C816S
|-
| Clock || 20 MHz
|-
|-
| '''Turbo Master CPU''' || NMOS 6502 @ ≈4 MHz || none || 1990 || Edge connector || “Bank-stealing” waits during VIC DMA; requires stub ROM for KERNAL patching.
| Opcodes || Documented 6510 opcodes only
|-
|-
| '''Flash 8''' || WDC 65C816 @ 8 MHz || none || 1993 || Edge connector || German kit; hardware wait-state generator for VIC access.
| Support chip || Altera CPLD
|-
|-
| '''SuperCPU v1 / v2''' || WDC 65C816 @ 20 MHz (switch-able 1×/5×/20×) || up to 16 MB (SuperRAMCard) || 1996 / 1997 || Edge connector pass-through || Hitachi HD6120 glue logic (v1) → CMD FPGA (v2); fully transparent timing compensation.
| On-card RAM || 128 KB SRAM
|-
|-
| '''Turbo Process''' || WDC 65C02 @ ≈3.5 MHz || none || 1996 || Internal daughter-board || Installation required desoldering the 6510; limited commercial run.
| ROM || 64 KB SuperCPU DOS
|-
|-
| '''Chameleon 64 (FPGA)''' || 65816-compatible soft-core @ ~48 MHz* || 16 MB SDRAM || 2011 || Docking-station / cartridge || Also functions as stand-alone FPGA C-64. *Effective “Turbo” factors ×1…×11 selectable.
| Expansion || Cartridge pass-through, SuperRAM Card (1–16 MB), "Rocket Socket" header
|-
|-
| '''Ultimate 64 / U64 Elite''' || FPGA SoC (65816-like) @ 48 MHz || 16 MB SDRAM || 2018 || Replacement main-board || Whole-system re-implementation; per-cycle compatible “soft-6510” plus Turbo.
| Installation || External, cartridge port
|}
|}
<ref name="c64wiki" />


*Clock figures are the raw CPU frequency; '''effective speed-up''' depends on VIC-II DMA stealing and memory-wait strategies.*
'''v1 against v2.''' The first SuperCPU was released with an Altera CPLD too small to hold all the compatibility logic CMD wanted, and it was buggy as a result. The second version fitted a higher-capacity CPLD and generally solved the problem. If you are buying one, that is the difference that matters.<ref name="c64wiki" />


== Technical principles ==
=== Register map ===


; Bus arbitration 
The SuperCPU is controlled and detected through registers in the $D0xx space. This matters beyond the SuperCPU itself, because later hardware imitates it.<ref name="c64wiki" />
The VIC-II still needs '''40 CPU cycles per raster line''' for video-DMA.  Turbo accelerators therefore:
* '''Stretch φ2 low-time''' (Turbo Master/Flash 8) so that fast code runs only when the VIC is idle.
* '''Shadow RAM''' on-board and replay writes to the real C-64 DRAM during idle slots (SuperCPU).
  A fast 16-bit 65816 runs from zero-wait SRAM while the VIC keeps reading the slow motherboard RAM.


; Memory mapping 
{| class="wikitable styled-table" style="width:90%; text-align:left;"
Most units expose extra RAM through the standard '''\$FFxx banking lines''' (EXROM/GAME or REU registers).  The SuperCPU’s *SuperRAMCard* appears at \$DF00 and can be logically mapped in 64 KB pages, giving GEOS 2.0 a full 4–16 MB workspace.
|+'''SuperCPU registers'''
 
! Address !! Purpose
; Compatibility layers 
|-
* '''IO shadowing''' – writes to \$D000–\$DFFF are mirrored so that timers/sprites still update at 1 MHz cadence. 
| $D074 (53364) || VIC bank 2 / GEOS optimisation (mirror $8000–$BFFF)
* '''KERNAL patch''' – accelerators supply a tiny ROM that intercepts IRQ entry/exit to resynchronise with VIC safe-lines (Turbo Master). 
|-
* '''Turbo OFF switch''' – most devices fall back to 1 MHz for cycle-exact demos or $DD00 colour‐cycle loading schemes.
| $D075 (53365) || VIC bank 1 optimisation (mirror $4000–$7FFF)
 
|-
== Benchmarks ==
| $D076 (53366) || BASIC optimisation (mirror $0400–$07FF)
{| class="wikitable" style="font-size:90%; text-align:center; width:80%; margin:0 auto;"
|-
! rowspan="2"| Accelerator !! colspan="2"| BASIC “PI Test”<br />([[User port loop-back]]) !! colspan="2"| Assembly Dhrystone<br />(32-bit) !! Notes
| $D077 (53367) || No optimisation — mirror all memory (v1 default)
|-
| $D07A (53370) || Software speed select — normal
|-
| $D07B (53371) || Software speed select — turbo (20 MHz)
|-
| $D07E / $D07F || Hardware register enable / disable
|-
| $D0B0 (53424) || SuperCPU mode detect register
|-
| $D0B3 (53427) || Enhanced optimisation register (v2 only)
|-
|-
! Seconds (1×) !! Speed-up !! DMIPS (1×) !! Speed-up
| $D0B4 (53428) || Optimisation mode flags (v1 and v2)
|-
|-
| Un-accelerated || 68 s || 1.0× || 0.18 || 1.0× || Reference C-64 (1982)
| $D0B5 (53429) || JiffyDOS switch flag / CPU speed switch flag
|-
|-
| Turbo Master CPU || 19 s || 3.5× || 0.55 || 3.0× || Wait-state hit at badlines
| $D0B6 (53430) || Processor emulation mode flag (v1 only)
|-
|-
| Flash 8 || 11 s || 6.2× || 0.95 || 5.3× || Full 8 MHz except colour fetch
| $D0B8 (53432) || Software speed flag / master speed flag
|-
|-
| SuperCPU @20 MHz || 3.4 s || 20× || 2.9 || 16× || GEOS boots in ≈4 s!
| $D0BC (53436) || DOS extension mode flag / RAMLink hardware registers flag
|-
|-
| Chameleon ×11 || 2.9 s || 23× || 3.2 || 18× || “Cycle exact” turbo
| $D200–$D2FF || System RAM
|-
|-
| U64 Turbo ×48 || 1.5 s || 45× || 5.8 || 32× || RAM in SDRAM, VIC DMA virtualised
| $D300–$D3FF || User RAM, available to user programs
|}
|}


(Data averaged from user reports and '''SysInfo v4.4''' runs.)  Exact numbers vary with cache settings, memory contention and whether *bad-line* throttling is enabled.
== The SuperCPU's afterlife ==
 
The register interface outlived the hardware. The '''[[Ultimate 64 Motherboard|Ultimate 64]]''' implements '''SuperCPU-compatible''' software speed-select registers at '''$D07A''' and '''$D07B''' and a '''SuperCPU detect register at $D0BC''', so software written for a SuperCPU can find and drive its turbo.<ref name="u64" />
 
The U64 is also worth reading for one lesson that applies to every accelerator: on that board, disabling badline timing gives the CPU more slots but '''does not change the BA signal at the cartridge port''', so anything reaching an external device — or a real SID in a socket — is still throttled by badlines. Accelerating the processor never accelerates the bus it has to share.<ref name="u64" />
 
== Other accelerators ==
 
The following are recorded as C64/C128 CPU accelerators:<ref name="c64wiki" />


== Software support ==
* '''Turbo Process'''
* '''GEOS 2.0–2.1''' detects the SuperCPU and patches its VBL handler for 20 MHz operation, giving near-instant screen redraw. 
* '''Turbo Master CPU'''
* '''Turbo Macro Pro''' and '''64tass''' include '''“SPDXL”''' assemblers that emit 65816 op-codes to exploit the 24-bit address space. 
* '''Flash 8'''
* '''Games/Demos''' – few require the accelerator, but *Metal Dust* (2005) famously needs the SuperCPU’s 65816 and 4 MB RAM. 
* '''Turbo Chameleon 64'''
* '''CP/M cartridge clones''' *cannot* coexist with turbo cards – both expect exclusive use of the expansion bus.
* '''F7 Turbo Card'''
* '''Turbo Demo Card (TDC)'''


== Power & heat considerations ==
'''This wiki has not verified the processor, clock, RAM fit or release date of any of these against its maker's documentation''', and does not state them. Specification tables for these machines circulate widely and contradict each other; several published comparisons attribute one product's parts to another.
High-speed 65xx CPUs and external SRAM draw '''up to 800 mA''' at 5 V.  Original Commodore “brick” PSUs are marginal; modern switch-mode supplies or a '''C64 Saver''' are strongly recommended. The SuperCPU v1’s CPLD runs hot (≈70 °C) – later v2 fixed this with a cooler FPGA and heat-spreaders.


== Availability in 2025 ==
'''The Turbo Chameleon 64 is end-of-life at Individual Computers''' — its wiki page is filed under their EOL category — so do not treat it as a current purchase.<ref name="icomp">Individual Computers, ''Chameleon'', https://wiki.icomp.de/wiki/Chameleon . Filed under the manufacturer's '''EOL''' category.</ref>
* '''Original CMD SuperCPUs''' are scarce (≈ €800 used). 
* '''Flash 8''' occasionally appears as unpopulated PCBs on German forums. 
* '''Chameleon 64 V2''' is still manufactured by Individual Computers (~€250). 
* '''Ultimate 64 Elite''' (replacement main-board with Turbo) ships in small batches several times a year.
* '''Commodore 64 Ultimate''' (FPGA-based re-creation full system with turbo up to 64MHz) started shipping in November 2025 and is still available (~€298).  


== DIY and open-source projects ==
== The modern route to a fast 64 ==
* '''SaRuMan 65816 core''' – open VHDL clone of the SuperCPU memory controller.
 
* '''Pi1541-Turbo''' – over-clocks the 6510 only during disk-I/O by injecting a 2 MHz clock on φ2.
If the object is speed rather than period hardware, the practical options today are FPGA boards rather than cartridges:
* '''Kola-Max''' – bread-board prototype using a W65C816 @ 14 MHz plus dual-port SRAM (proof-of-concept, 2023 GitHub release).
 
* '''[[Ultimate 64 Motherboard|Ultimate 64 and Ultimate 64 Elite-II]]''' — up to 48 MHz and 64 MHz respectively, with SuperCPU-compatible control registers.<ref name="u64" />
* '''Commodore 64 Ultimate''' — the board Commodore now sells, built on an AMD Xilinx '''Artix-7''' FPGA with 128 MB of DDR2 and 16 MB of flash. Pre-orders opened at '''US$299.99''' for the base machine, with a Starlight edition at $349 and a Founders edition at $499, and shipping was announced for October 2025. Ultimate64.com states that Commodore has taken over sales of their version of the Elite-II board.<ref name="c64u">Announcement coverage of the Commodore 64 Ultimate, e.g. Tom's Hardware, https://www.tomshardware.com/video-games/retro-gaming/the-commodore-64-ultimate-computer-is-the-companys-first-hardware-release-in-over-30-years-pre-orders-start-at-usd299 . Source for the Artix-7 FPGA, 128 MB DDR2, 16 MB flash, the three editions and their launch prices, and the announced October 2025 shipping date. Prices are launch figures, not current ones.</ref><ref name="u64shop">Ultimate Products B.V., https://ultimate64.com/ — front-page notice that the Ultimate 64 Elite-II black short boards are sold out and that Commodore has taken over the sales of their version of this board. Read September 2026.</ref>
 
== Power ==
 
Any cartridge-port accelerator adds load to the C64's +5 V rail, which the original Commodore supplies were never generous about. If you are running one on a period brick, read [[Commodore 64 Power-Supply Protector (C64 Saver)]] first — an ageing supply that has begun to drift high will take the accelerator with it.
 
'''This wiki has no measured current figure for any accelerator on this page.''' Measure yours rather than trusting a published one.


== Related pages ==
== Related pages ==
* [[Ultimate 64 Motherboard]]
* [[C64 Reloaded MK2]]
* [[Commodore 64 Power-Supply Protector (C64 Saver)]]
* [[Commodore 64 Power-Supply Protector (C64 Saver)]]
* [[PLA Replacement Options]]
* [[PLA Replacement Options]]
* [[Ultimate 64 Motherboard]]
* [[JiffyDOS Kernal Upgrade]]
* [[Jump-less Dual-Kernal Switcher]]
 
== References ==
<references />


[[Category:Commodore 64 Modifications and Enhancements]]
[[Category:Commodore 64 Modifications and Enhancements]]
[[Category:Commodore Systems]]
[[Category:Commodore Systems]]

Latest revision as of 22:25, 23 September 2026

SuperCPU and turbo accelerators for the Commodore 64/128
Caption The Creative Micro Designs SuperCPU
Type Cartridge-port CPU accelerators
Designer Unknown
Manufacturer Creative Micro Designs and others
First released Unknown
Latest revision —
Operating voltage —
Layers / PCB —
Compatibility Commodore 64, 64C, SX-64 and Commodore 128 in 64 mode
Features —
Model No. —

A turbo accelerator replaces or bypasses the Commodore 64's 1 MHz 6510 with a faster processor while keeping the rest of the machine working. The best known is Creative Micro Designs' SuperCPU.

This page carries only figures that can be checked against a maker's documentation or a community reference that mirrors it.[1][2]

The SuperCPU

[edit | edit source]
CMD SuperCPU
Manufacturer Creative Micro Designs
Released 1996
Discontinued 2001
Release price US$199
Processor WDC 65C816S
Clock 20 MHz
Opcodes Documented 6510 opcodes only
Support chip Altera CPLD
On-card RAM 128 KB SRAM
ROM 64 KB SuperCPU DOS
Expansion Cartridge pass-through, SuperRAM Card (1–16 MB), "Rocket Socket" header
Installation External, cartridge port

[1]

v1 against v2. The first SuperCPU was released with an Altera CPLD too small to hold all the compatibility logic CMD wanted, and it was buggy as a result. The second version fitted a higher-capacity CPLD and generally solved the problem. If you are buying one, that is the difference that matters.[1]

Register map

[edit | edit source]

The SuperCPU is controlled and detected through registers in the $D0xx space. This matters beyond the SuperCPU itself, because later hardware imitates it.[1]

SuperCPU registers
Address Purpose
$D074 (53364) VIC bank 2 / GEOS optimisation (mirror $8000–$BFFF)
$D075 (53365) VIC bank 1 optimisation (mirror $4000–$7FFF)
$D076 (53366) BASIC optimisation (mirror $0400–$07FF)
$D077 (53367) No optimisation — mirror all memory (v1 default)
$D07A (53370) Software speed select — normal
$D07B (53371) Software speed select — turbo (20 MHz)
$D07E / $D07F Hardware register enable / disable
$D0B0 (53424) SuperCPU mode detect register
$D0B3 (53427) Enhanced optimisation register (v2 only)
$D0B4 (53428) Optimisation mode flags (v1 and v2)
$D0B5 (53429) JiffyDOS switch flag / CPU speed switch flag
$D0B6 (53430) Processor emulation mode flag (v1 only)
$D0B8 (53432) Software speed flag / master speed flag
$D0BC (53436) DOS extension mode flag / RAMLink hardware registers flag
$D200–$D2FF System RAM
$D300–$D3FF User RAM, available to user programs

The SuperCPU's afterlife

[edit | edit source]

The register interface outlived the hardware. The Ultimate 64 implements SuperCPU-compatible software speed-select registers at $D07A and $D07B and a SuperCPU detect register at $D0BC, so software written for a SuperCPU can find and drive its turbo.[2]

The U64 is also worth reading for one lesson that applies to every accelerator: on that board, disabling badline timing gives the CPU more slots but does not change the BA signal at the cartridge port, so anything reaching an external device — or a real SID in a socket — is still throttled by badlines. Accelerating the processor never accelerates the bus it has to share.[2]

Other accelerators

[edit | edit source]

The following are recorded as C64/C128 CPU accelerators:[1]

  • Turbo Process
  • Turbo Master CPU
  • Flash 8
  • Turbo Chameleon 64
  • F7 Turbo Card
  • Turbo Demo Card (TDC)

This wiki has not verified the processor, clock, RAM fit or release date of any of these against its maker's documentation, and does not state them. Specification tables for these machines circulate widely and contradict each other; several published comparisons attribute one product's parts to another.

The Turbo Chameleon 64 is end-of-life at Individual Computers — its wiki page is filed under their EOL category — so do not treat it as a current purchase.[3]

The modern route to a fast 64

[edit | edit source]

If the object is speed rather than period hardware, the practical options today are FPGA boards rather than cartridges:

  • Ultimate 64 and Ultimate 64 Elite-II — up to 48 MHz and 64 MHz respectively, with SuperCPU-compatible control registers.[2]
  • Commodore 64 Ultimate — the board Commodore now sells, built on an AMD Xilinx Artix-7 FPGA with 128 MB of DDR2 and 16 MB of flash. Pre-orders opened at US$299.99 for the base machine, with a Starlight edition at $349 and a Founders edition at $499, and shipping was announced for October 2025. Ultimate64.com states that Commodore has taken over sales of their version of the Elite-II board.[4][5]

Power

[edit | edit source]

Any cartridge-port accelerator adds load to the C64's +5 V rail, which the original Commodore supplies were never generous about. If you are running one on a period brick, read Commodore 64 Power-Supply Protector (C64 Saver) first — an ageing supply that has begun to drift high will take the accelerator with it.

This wiki has no measured current figure for any accelerator on this page. Measure yours rather than trusting a published one.

[edit | edit source]

References

[edit | edit source]
  1. ↑ 1.0 1.1 1.2 1.3 1.4 SuperCPU, C64-Wiki, https://www.c64-wiki.com/wiki/SuperCPU . Community reference. Source for the manufacturer, release and discontinuation years, release price, processor, clock, support-chip type, on-card RAM and ROM, expansion options, the v1-to-v2 CPLD change, and the SuperCPU register map at $D074–$D0BC with system and user RAM at $D200–$D3FF. It also lists the other accelerators named below.
  2. ↑ 2.0 2.1 2.2 2.3 Gideon Zweijtzer, Ultimate Documentation — Turbo mode settings, https://1541u-documentation.readthedocs.io/ . Source for the Ultimate 64's SuperCPU-compatible registers at $D07A, $D07B and $D0BC, for the 48 MHz and 64 MHz subsystem clocks and CPU speed indices, and for the statement that disabling badline timing does not affect the BA signal at the cartridge port.
  3. ↑ Individual Computers, Chameleon, https://wiki.icomp.de/wiki/Chameleon . Filed under the manufacturer's EOL category.
  4. ↑ Announcement coverage of the Commodore 64 Ultimate, e.g. Tom's Hardware, https://www.tomshardware.com/video-games/retro-gaming/the-commodore-64-ultimate-computer-is-the-companys-first-hardware-release-in-over-30-years-pre-orders-start-at-usd299 . Source for the Artix-7 FPGA, 128 MB DDR2, 16 MB flash, the three editions and their launch prices, and the announced October 2025 shipping date. Prices are launch figures, not current ones.
  5. ↑ Ultimate Products B.V., https://ultimate64.com/ — front-page notice that the Ultimate 64 Elite-II black short boards are sold out and that Commodore has taken over the sales of their version of this board. Read September 2026.
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