Psion Series 3
 | |
| A Psion Series 3 (1991) | |
| Specifications | |
|---|---|
| Developer | Psion PLC |
| Manufacturer | Psion PLC |
| Type | Clamshell palmtop / PDA |
| Released | 1991 |
| Discontinued | Replaced by the Series 3a in 1993 |
| Intro price | £179 (128 KB), £249 (256 KB) |
| CPU | NEC V30H (80C86-compatible) @ 3.84 MHz, with Psion ASIC1 and ASIC2 |
| Memory | 128 KB or 256 KB RAM |
| Storage | Two Solid State Disk (SSD) slots |
| Display | 240 × 80 monochrome LCD, 97 × 39 mm |
| Sound | Piezoelectric buzzer, with DTMF tone dialling |
| Power | 2 × AA cells; CR1620 lithium backup cell; DC input socket |
| Dimensions | 165 mm × 85 mm × 22 mm |
| Weight | 275 g including batteries |
| OS / Firmware | EPOC16 (SIBO), with OPL |
| Predecessor | Psion Organiser II |
| Successor | Psion Series 3a |
| Model no. | Also sold as the Acorn Pocket Book |
The Psion Series 3 is a clamshell palmtop computer released by Psion in 1991. It has a QWERTY keyboard, a 240 × 80 pixel screen, a 16-bit NEC V30H processor running Psion's multitasking EPOC16 operating system, the OPL programming language, and two slots for Solid State Disks (SSDs).[1][2] It is the first of the Series 3 range, which continued with the 3a (1993), 3c (1996) and 3mx (1998).[1]
The Series 3 is the only member of the range built on Psion's original three-chip SIBO design (V30H processor, ASIC1 and ASIC2). From the 3a onwards the three chips are combined in a single ASIC9.[3]
History
The Series 3 was launched in 1991 at £179 with 128 KB of RAM and £249 with 256 KB. About 1.5 million Series 3 machines were made across the range.[1] Acorn Computers sold the Series 3 as the Acorn Pocket Book, aimed at schoolchildren. The hardware was the same, but Agenda was left out (it was supplied separately on floppy disk) and System, Word, Sheet and Data were renamed Desktop, Write, Abacus and Cards.[1] The Series 3a replaced it in 1993.[1]
Specifications
| Item | Specification |
|---|---|
| Processor | NEC V30H (80C86-compatible, 16-bit) at 3.84 MHz |
| System chips | Psion ASIC1 (system controller) and ASIC2 (clock, on/off control, serial protocol, keyboard and buzzer interfaces) |
| RAM | 128 KB or 256 KB |
| Display | 240 × 80 monochrome LCD, 97 × 39 mm, black and white only |
| Video memory | 8-bit access at half speed |
| Sound | Piezoelectric buzzer; no sound recording; DTMF tone dialling |
| Storage | Two SSD slots |
| Serial | 9600 baud through the optional link, with its software held in the link pod |
| Main power | 2 × AA cells; DC input socket for an external adaptor |
| Backup power | CR1620 lithium coin cell |
| Size and weight | 165 × 85 × 22 mm, 275 g with batteries |
Architecture and processor
| Device | Package | Function |
|---|---|---|
| V30H | 8086-compatible CPU, fully static, so the clock can be stopped at any time without losing state | |
| ASIC1 | 100-pin QFP, about 4300 gates | Bus controller, bus converter, 16-bit timer, LCD controller, memory and I/O decoding, 8-channel interrupt controller, watchdog, address and I/O protection |
| ASIC2 | 80-pin QFP, about 2200 gates | System clock oscillator, on/off control, 8-channel SIBO serial protocol controller, keyboard interface, buzzer interface and NMI generation |
The clock is limited to 3.84 MHz because ASIC1 reads the ROM as two 8-bit bytes to build each 16-bit word. At 3.84 MHz that needs ROM with an access time of about 250 ns, and the mask ROMs readily available at the time managed 200 ns. The 3a's ASIC9 makes 16-bit accesses, which allowed the clock to be doubled with the same ROM.[3]
Other points from Psion's hardware reference that matter on the bench:[3]
- ASIC1 stops the processor clock on a HALT instruction and holds it low until an interrupt or NMI arrives, so a machine that seems frozen may be waiting for an interrupt.
- The watchdog is a 2-bit counter clocked at 4 Hz. It raises an NMI if it is not reset, which happens after about 0.75 seconds with interrupts disabled.
- ASIC2 also raises an NMI on a power failure and from the micro-switches on the SSD doors when a pack is inserted or removed.
Timekeeping
The ASIC1/ASIC2 design has no hardware real-time clock. Time is kept with a free-running counter, and the processor has to wake about every 8 hours to update it. If the processor cannot start, because the main batteries are missing, the time is lost. ASIC9 added a separate 32-bit real-time clock to remove this limitation, so a Series 3 left without its AA cells loses the time where a 3a does not.[3]
Serial channels
ASIC2's 8-channel serial protocol controller serves the power supply, the SSDs, the expansion ports and the high-speed link:[3]
| Channel | Function |
|---|---|
| 0 | Power supply |
| 1–4 | SSDs |
| 5, 6 | Expansion ports |
| 7 | High-speed link |
Power
All Series 3 variants run from two AA cells, with a small lithium button cell for backup and a DC input socket for an external mains adaptor. The Series 3's backup cell is a CR1620.[1] Series 3 power supplies generate their rails with switch-mode regulators; Vcc1, the always-on +5 V supply for ASIC1, ASIC2 and the memory, comes from a DC-to-DC converter, and the SSD slots receive a +16 V programming supply (Vh) for writing Flash packs.[3] When the main cells fail or are removed, the machine enters a backup state in which Vcc1 is fed from the backup cell and the machine cannot be switched on.[3]
Known faults
The Series 3 clamshell has three documented weak points: breakage of any of the four hinges, loss of function in the button bar between the two halves, and deterioration of the cable linking the keyboard half to the screen, which produces vertical lines on the display.[1] See the Psion Series 3 Troubleshooting Guide and Psion Series 3 Hinge Repair.
Documentation
- SIBO Hardware Reference, version 2.10, 3 February 1995, part of Psion's SIBO Software Development Kit, published online by the Psion Documentation Project. It describes the V30H, ASIC1, ASIC2, ASIC9 and the power supply rails.[3]
- Psion published no service manual or schematic for the Series 3.
General maintenance
Batteries, the SSD slots, the keyboard and the clamshell. See the Psion Series 3 General Maintenance guide.
Troubleshooting
See the Psion Series 3 Troubleshooting Guide.
Hinge repair
See Psion Series 3 Hinge Repair.
Related pages
- Psion Series 3 General Maintenance
- Psion Series 3 Troubleshooting Guide
- Psion Series 3 Hinge Repair
- Psion Series 3a
- Psion Series 3c
- Psion Series 3mx
- Psion Siena
- Psion Organiser II
- Battery Refurbishment
References
- ↑ 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 "Psion Series 3", Wikipedia.
- ↑ 2.0 2.1 "Psion specifications", netogram.com, section "Psion 3".
- ↑ 3.00 3.01 3.02 3.03 3.04 3.05 3.06 3.07 3.08 3.09 3.10 Psion PLC, SIBO Hardware Reference, version 2.10, 3 February 1995, sections "The Principal Chip Set", "ASIC1", "ASIC2", "ASIC9" and "PSU subsystem". Published by the Psion Documentation Project.