SNES Schematic
The SNES schematic is a community redraw of the Super NES mainboard on one A1 sheet. Its title block reads "Super Nintendo (NTSC) Revision 2 Motherboard (w/ Revision 1 SHVC-SOUND connector)", drawn by Jonathon W. Donaldson, file snes_mobo.SchDoc, revision 1.5, dated 24 February 2014. It is not a Nintendo document. The sheet lists its sources as the NESdev forum thread on SNES schematics, wiki.superfamicom.org and rm-rfroot.net, and gives a Dropbox link and rm-rfroot.net/snes_fpga as places to find the latest version.
For Nintendo's own service information see the Playtronic Manual Técnico do Super NES, which has board layouts, parts lists and diagnostic tables but no schematic.
Boards covered
[edit | edit source]The title block names four revision 2 boards: SNS-CPU-GPM-01 (1992), SNS-CPU-GPM-02 (1993), SNS-CPU-RGB-01 (1994) and SNS-CPU-RGB-02 (1995).
A note on the sheet records the main difference from the first revision: the first-revision SNES has two LM2904 dual op-amps in place of the single LM324 quad op-amp, one on the SHVC-SOUND daughterboard for the pre-amplifier and one on the motherboard for the post-amplifier. Connector P5, the SHVC-SOUND connector, exists only on the first revision and is drawn for reference.
What is on the sheet
[edit | edit source]The whole mainboard: the CPU and both PPUs with their pin assignments, work RAM, video RAM, the sound section, the cartridge connector, both controller ports, the expansion port, the multi-out, the video encoder, the analogue mixer (which mixes the APU's audio with audio from the cartridge and the expansion port) and the power input. Designators carry component values. Some details:
- Power: the input passes through line filter T1 (ZJYS5102-2P), fuse F1 (1.5 A) and series diode D1 (PB1100), with surge absorber VA1 (ERZC050K220), to the power switch P3 and regulator U12, a 7805. C67, 1000 µF 25 V, is drawn in brackets on the switch side of D1. The sheet notes the supply as "+10V (Nominal) for NTSC", with VCC 5 V and VS 9 V.
- Clocks: X1 21.47727 MHz, X2 24.576 MHz.
- The CIC is U8 (F411).
- A note beside the power section gives a pin pitch of 2.5 mm ("not 2.54mm") and a PCB thickness of 1.2 mm ("not 1.5mm"), without saying which part it refers to.
What it does not contain
[edit | edit source]- No parts list: values are annotations on the drawing, with no quantities or Nintendo part numbers.
- No PAL or Japanese boards, no first-revision SHVC or SNS-CPU boards beyond the P5 note, and no 1CHIP boards or the later SNS-101.
- No external power supply.
- No board layout or component location map.
- No fault-finding procedure, test points or waveforms.
Download: snes_schematic.pdf