Atari 520STE
 | |
| Atari 520STE with integrated floppy drive and internal PSU | |
| Specifications | |
|---|---|
| Manufacturer | Atari Corporation |
| Type | Home computer / personal computer |
| Released | September 1, 1989 |
| Discontinued | 1992–1993 (ST family discontinued) |
| Intro price | Approximately £299 (UK, 1989); pricing varied by region |
| CPU | Motorola MC68000 @ 8 MHz (PLCC‑68 or DIP‑64 depending on board revision) |
| Memory | 512 KB ST‑RAM (2× 256 KB 30‑pin SIMMs); expandable to 4 MB |
| Storage | Internal 3.5″ DS/DD 720 KB floppy (WD1772 controller); external 14‑pin DIN floppy port; ACSI hard disk port (DB‑19) |
| Display | 320×200 (16 colors from 4096), 640×200 (4 colors from 4096), 640×400 mono (~71.2 Hz) |
| Sound | Yamaha YM2149F PSG (3 voices + noise) + 8‑bit stereo DMA PCM (6.258/12.517/25.033/50.066 kHz); National Semiconductor LMC1992 analog mixer (Microwire interface) |
| Dimensions | 475 mm × 290 mm × 70 mm (18.7 × 11.4 × 2.8 in) |
| Weight | ≈4.3 kg (≈9.5 lb) |
| OS / Firmware | TOS 1.06 (also known as TOS 1.60) or TOS 1.62 in 256 KB ROM (2× 128 KB chips) |
| Predecessor | Atari 520ST |
| Successor | Atari Mega STE |
The Atari 520STE is the entry‑level model of Atari's STE (ST Enhanced) family, released in 1989. It shares the same motherboard and case design as the Atari 1040STE, differing only in the amount of factory‑installed RAM: the 520STE ships with 512 KB (two 256 KB 30‑pin SIMMs) versus the 1040STE's 1 MB. The STE line introduced several hardware enhancements over the earlier ST/STF/STFM range, including a 4096‑color palette, hardware‑assisted scrolling, stereo DMA sound, a BLiTTER chip, enhanced joystick ports with analog paddle support, and SIMM‑based RAM.[1][2]
Architecture and Processor
[edit | edit source]The 520STE retains the Motorola MC68000 CPU running at 8 MHz, identical to all prior ST models. The "16/32‑bit" designation refers to the 68000's 16‑bit external data bus with 32‑bit internal registers and ALU, and a 24‑bit address bus providing a 16 MB address space.[3]
The key architectural change in the STE is the consolidation of the previously separate GLUE and MMU custom ICs into a single 144‑pin surface‑mount device: the GST MCU (GLUE + MMU combo). This chip handles bus timing, address decoding, DRAM management, clock generation, DMA sound address counters, and the new enhanced joystick/paddle/lightpen interface. Despite having a full 23‑bit address bus (capable of decoding the entire 16 MB space), the GST MCU retains the same number of multiplexed RAM address pins (MAD0–MAD9) as the original MMU, limiting the STE to a maximum of 4 MB RAM.[4]
Custom and Support ICs
[edit | edit source]The 520STE motherboard contains the following major ICs:
| IC | Function | Part Number(s) | Package |
|---|---|---|---|
| GST MCU | GLUE + MMU (bus timing, address decoding, DRAM control, clock generation, DMA sound address, joystick/paddle management) | C302183‑002 (combined MCU); earlier boards may have separate GLUE/MMU | 144‑pin QFP (SMD) |
| GST Shifter | Video DMA/serializer + DMA sound data path | C300588‑001 or C301712‑001 | 64‑pin DIP (socketed on most boards) or QFP |
| BLiTTER | Block image transfer (bit‑blit operations, hardware‑assisted graphics) | C302014 or integrated into later MCU revisions | PLCC‑68 or integrated |
| MC68000 | CPU, 16/32‑bit | MC68000FN8 (PLCC‑68) or MC68000P8 (DIP‑64) | PLCC‑68 or DIP‑64 |
| MC68901 MFP | Multi‑Function Peripheral (timers, interrupt controller, serial I/O, 200 Hz system tick) | MC68901 | DIP‑48 |
| YM2149F | PSG sound (3 tone + noise channels) + 2× 8‑bit parallel I/O (printer data, control lines) | YM2149F | DIP‑40 |
| 2× MC6850 ACIA | Serial controllers for keyboard (IKBD) and MIDI, clocked at 500 kHz | MC6850 | DIP‑24 |
| WD1772 | Floppy disk controller at 8 MHz (250 kbit/s) | WD1772‑02‑02 | DIP‑28 |
| DMA controller | ACSI/floppy DMA arbitration | C025913‑38 or integrated equivalent | DIP‑40 |
| LMC1992 | Analog audio mixer (bass, treble, balance, master volume, input source selection via Microwire serial bus) | LMC1992 | DIP‑28 |
| 2× DAC (74F374 latches + R‑2R ladder) | 8‑bit stereo digital‑to‑analog conversion for DMA sound | 74F374 (data latches) | DIP‑20 |
Clock Distribution
[edit | edit source]The STE uses a 32 MHz master oscillator feeding the GST Shifter (video timing). The GST MCU receives 16 MHz from the Shifter and divides it to produce: 8 MHz (CPU, BLiTTER, DMA, WD1772, GST MCU internal), 4 MHz (MC68901 MFP), 2 MHz (originally for YM2149, though in the STE the YM2149 receives its 2 MHz from a separate 8 MHz oscillator divided by 4), and 0.5 MHz (ACIAs for keyboard/MIDI at 31.25 kbaud).[8]
The separate 8 MHz sound clock (SCLK) was introduced specifically to keep the YM2149 and WD1772 stable when an external genlock oscillator replaces the 32 MHz video clock. Without SCLK, switching to an external genlock frequency (e.g. 36 MHz) would shift the YM2149 pitch and cause the WD1772 to misread floppy disks.[9]
Memory
[edit | edit source]The 520STE ships with 512 KB of ST‑RAM installed as 2× 256 KB 30‑pin SIMMs (some very early production used SIPP modules with pins instead of edge connectors). The motherboard has four SIMM sockets. Supported configurations are:[10][11]
| Configuration | SIMMs Installed | Notes |
|---|---|---|
| 512 KB | 2× 256 KB | Factory default for 520STE |
| 1 MB | 4× 256 KB | Factory default for 1040STE |
| 2 MB | 2× 1 MB | Two slots populated |
| 4 MB | 4× 1 MB | Maximum supported configuration |
A 2.5 MB configuration (2× 256 KB + 2× 1 MB) is sometimes possible but is not officially supported and causes compatibility issues due to a bug in TOS memory detection.[12]
SIMMs must be 30‑pin, 80 ns or faster, and 8‑bit (non‑parity or parity, as the parity bit is ignored). The SIMMs are installed in pairs in banks of two.
Display and Graphics
[edit | edit source]Video Modes
[edit | edit source]The STE supports the same three base video modes as the original ST:
| Mode | Resolution | Colors | Refresh Rate | Monitor |
|---|---|---|---|---|
| Low | 320×200 | 16 from 4096 | 50 Hz PAL / 60 Hz NTSC | Color (SC1224/SM124 incompatible) |
| Medium | 640×200 | 4 from 4096 | 50 Hz PAL / 60 Hz NTSC | Color |
| High | 640×400 | Mono (2) | ~71.2 Hz | Monochrome (SM124/SM144) |
Palette Enhancement
[edit | edit source]The most visible graphics improvement in the STE is the expanded palette. The original ST's Shifter uses a 9‑bit palette (3 bits per channel, 512 colors total). The STE's GST Shifter extends this to 12 bits (4 bits per channel), providing 4096 possible colors. The extra bit per channel is stored in a previously unused bit position in each palette register, maintaining backward compatibility with ST software that writes only the original 3 bits.[13]
Hardware Scrolling
[edit | edit source]The GST MCU and GST Shifter together provide pixel‑precise hardware scrolling. Two new hardware registers control this:
- Horizontal scroll offset ($FF8265): 4‑bit value (0–15) specifying sub‑word pixel offset for smooth horizontal scrolling without CPU intervention.
- Line width ($FF820F): allows the logical screen width to exceed the physical display width, enabling efficient horizontal panning across a larger virtual screen.
This eliminated the need for CPU‑intensive software scrolling routines that were common on the original ST, and enabled arcade‑quality scrolling in STE‑specific games.[14]
Video Output
[edit | edit source]The monitor connector is the same 13‑pin DIN as the original ST, carrying analog RGB (0–1.0 Vpp, 75 Ω), separate H/V sync (TTL active low), monochrome video, and mono/stereo audio. The STE additionally provides a composite video output on the monitor connector where earlier STs often did not.
Sound
[edit | edit source]The STE features a dual audio subsystem:
YM2149F PSG (Legacy)
[edit | edit source]The Yamaha YM2149F provides three square‑wave tone generators, one noise generator, and a 5‑bit amplitude envelope generator, identical to the original ST. Its two 8‑bit I/O ports continue to handle the parallel printer interface and various control signals. In the STE, the YM2149 receives its 2 MHz clock from the dedicated 8 MHz sound oscillator (divided by 4) rather than from the GST MCU.
DMA Sound
[edit | edit source]The STE adds an 8‑bit stereo PCM DMA sound subsystem integrated into the GST Shifter. The GST MCU manages DMA address counters that fetch samples directly from ST‑RAM (which must reside within the first 4 MB). Four sample rates are available, derived from the 8 MHz SCLK:[15]
| Sample Rate | Divisor from SCLK |
|---|---|
| 6,258 Hz | ÷1278 |
| 12,517 Hz | ÷639 |
| 25,033 Hz | ÷319 |
| 50,066 Hz | ÷160 |
DMA sound control registers are located at $FF8900–$FF893F. Key registers include frame start address, frame end address, sound mode (mono/stereo, sample rate), and frame count register. The system supports single‑shot and repeat (auto‑loop) playback modes.
Digital‑to‑analog conversion uses two 74F374 octal latches feeding R‑2R resistor ladder networks, one per channel. The resulting analog signals are routed to the LMC1992 mixer.
LMC1992 Microwire Mixer
[edit | edit source]The National Semiconductor LMC1992 provides analog mixing and tone control via a 3‑wire serial Microwire interface. It controls:[16]
- Master volume (−80 dB to 0 dB in 2 dB steps)
- Left/right balance
- Bass (−12 dB to +12 dB in 2 dB steps)
- Treble (−12 dB to +12 dB in 2 dB steps)
- Input source mixing (DMA only, DMA + YM, DMA + YM at −12 dB)
The Microwire interface uses registers at $FF8922 (data) and $FF8924 (mask).
Known mixer design fault: The LMC1992 mixer setting for "DMA + YM at −12 dB" (bits %00) does not function correctly on the original hardware due to a PCB routing error. The AUDIO2 input pins (pins 5 and 25 of the LMC1992) are effectively tied to ground, preventing the −12 dB attenuated YM signal from reaching the mixer. This was documented by P.Putnik and can be corrected with a hardware modification involving a 10 kΩ and 47 kΩ resistor to restore the signal path.[17]
Audio Output
[edit | edit source]The STE provides stereo audio via two RCA phono jacks on the rear panel (left and right channels). This is a significant improvement over the original ST, which only had mono audio through the monitor connector. The STE's RCA outputs carry the mixed DMA + YM signal at line level, though the output level is known to be somewhat high and may benefit from external attenuation for sensitive amplifier inputs.
Enhanced Joystick Ports
[edit | edit source]In addition to the two standard DE‑9 joystick/mouse ports (active accent on Port 0 for mouse), the STE adds two 15‑pin enhanced joystick ports (active accent on the left side of the case). These support:[18]
- Standard digital joystick input (active accent on directional + fire)
- Analog paddle input (two axes per port via analog‑to‑digital conversion)
- Lightpen input (active accent on active accent active accent active accent active accent active accent active accent active accent active accent active accent active accent active accent active accent active accent active accent active accent active accent active accent active accent active accent active accent active accent active accent active accent active accent active accent active accent active accent)
- Team Tap multi‑player adapter support
The enhanced ports are directly managed by the GST MCU, with joystick data registers at $FF9200–$FF9211 and paddle/lightpen registers at $FF9210–$FF9215.
Input/Output and Expansion
[edit | edit source]The 520STE rear panel provides the following connectors, identical to the Atari 1040STE:
| Connector | Type | Notes |
|---|---|---|
| Monitor | 13‑pin DIN | Analog RGB, mono video, H/V sync, audio |
| Serial (Modem) | DB‑25 male | RS‑232C subset via MC1488/1489 line drivers |
| Parallel (Printer) | DB‑25 female | 8‑bit Centronics via YM2149 Port B |
| MIDI In | 5‑pin DIN | Via MC6850 ACIA at 31.25 kbaud |
| MIDI Out | 5‑pin DIN | Combined OUT/THRU wiring |
| External Floppy | 14‑pin DIN | Shugart‑style interface |
| ACSI (DMA) | DB‑19 female | Hard disk / laser printer interface, up to 2 MB/s |
| Cartridge | 40‑pin edge connector | Up to 128 KB ROM address space |
| Mouse/Joystick 0 | DE‑9 male | Under front of case |
| Joystick 1 | DE‑9 male | Under front of case |
| Enhanced Joystick A | 15‑pin | Left side; analog paddle/lightpen support |
| Enhanced Joystick B | 15‑pin | Left side; analog paddle/lightpen support |
| Audio L/R | 2× RCA phono | Stereo line‑level output |
| Power | Internal PSU | IEC C14 mains inlet (no external PSU brick) |
Operating System
[edit | edit source]The 520STE shipped with TOS 1.06 (internally versioned as 1.60) on early production units, later replaced by TOS 1.62. Both versions occupy 256 KB in two 128 KB ROM chips. The TOS ROMs are mounted in 32‑pin sockets with three jumpers (W102, W103, W104) to configure pin routing for different ROM types (EPROM vs. mask ROM).[19]
TOS 1.62 includes bug fixes over 1.06 and is generally recommended. Both versions contain preliminary 68030 detection code (testing bit 9 of the CACR register) and corrected Line F and privilege violation handling for improved 68020/68030 compatibility, though some of these routines contain bugs in the shipping ROM.[20]
The system can be user‑upgraded to TOS 2.06 by replacing the ROM chips, which provides further bug fixes and a modernized desktop.
Motherboard Revisions
[edit | edit source]The STE motherboard went through several revisions:[21]
| Board Number | Notes |
|---|---|
| CA300779‑001 REV 5.1 | Early STE board; separate BLiTTER chip; GST Shifter in DIP socket (C300588) |
| CA401177 | Mid‑production; surface‑mounted 68000 CPU on some examples |
| CA4003290 | Later production; most commonly encountered STE board |
All revisions share the same capacitor reference designators and values on the mainboard. The primary visible differences are in IC packaging (DIP vs. SMD for some components) and minor routing changes.
Power Supply
[edit | edit source]The 520STE uses an internal switched‑mode PSU (same unit as the 1040STE, both sharing the 1040‑style case). Common PSU types found in STE machines include the Mitsumi SR98 (220–240 V), DVE DSP‑508A, and ASTEC ASP34. All provide the following DC rails:[22]
| Rail | Nominal Voltage | Tolerance | Purpose |
|---|---|---|---|
| +5 V | 5.00 V | ±5% (4.75–5.25 V) | Logic, RAM, custom ICs |
| +12 V | 12.00 V | ±5% | Floppy drive motor, RS‑232 line drivers, analog circuits |
| −12 V | −12.00 V | ±10% | RS‑232 line drivers (MC1489) |
PSU capacitor degradation is the single most common source of reliability problems in STE machines. Symptoms of failing PSU capacitors include random crashes, video ripple/dimming during floppy access, audio noise, and intermittent boot failures. See Atari STE Capacitor Replacement Guide for detailed capacitor lists and Atari STE Troubleshooting Guide for diagnostic procedures.
Differences from the STF/STFM
[edit | edit source]| Feature | ST/STF/STFM | 520STE/1040STE |
|---|---|---|
| Palette | 512 colors (9‑bit, 3:3:3 RGB) | 4096 colors (12‑bit, 4:4:4 RGB) |
| RAM | Soldered DRAM chips | 30‑pin SIMM sockets (user‑upgradeable) |
| DMA Sound | None | 8‑bit stereo PCM at 4 sample rates + LMC1992 mixer |
| Audio Output | Mono via monitor port only | Stereo RCA phono jacks + monitor port |
| BLiTTER | Optional (footprint present on some boards) | Standard (always fitted) |
| Hardware Scrolling | None (software only) | Pixel‑precise via GST Shifter/MCU registers |
| Enhanced Joystick Ports | None | 2× 15‑pin with analog paddle/lightpen support |
| Custom IC Integration | Separate GLUE + MMU + Shifter | GST MCU (GLUE+MMU combined) + GST Shifter |
| DMA Disk Interrupts | Software polling only | Hardware interrupt on DMA transfer completion (MFP I05) |
| TOS | 1.00/1.02/1.04 (192 KB, 2–6 chip) | 1.06/1.62 (256 KB, 2‑chip) |
See Also
[edit | edit source]- Atari 1040STE
- Atari 520ST
- Atari STE General Maintenance
- Atari STE Troubleshooting Guide
- Atari STE Capacitor Replacement Guide
References
[edit | edit source]- ↑ Atari ST, Wikipedia—link(accessed 2026-03-27)
- ↑ Atari STE Hardware Description, info-coach.fr (DrCoolZic translation)—link(accessed 2026-03-27)
- ↑ Atari ST, Wikipedia—link(accessed 2026-03-27)
- ↑ Atari STE Hardware Description — GST MCU section, info-coach.fr—link(accessed 2026-03-27)
- ↑ Atari STE Hardware Description, info-coach.fr—link(accessed 2026-03-27)
- ↑ GST Shifter chip numbers, exxos Forum—link(accessed 2026-03-27)
- ↑ Atari custom IC part numbers, Atari-Forum—link(accessed 2026-03-27)
- ↑ Atari STE Hardware — Clock Distribution, info-coach.fr—link(accessed 2026-03-27)
- ↑ Atari STE Hardware — SCLK explanation, info-coach.fr—link(accessed 2026-03-27)
- ↑ Atari ST Memory Information, info-coach.fr—link(accessed 2026-03-27)
- ↑ Atari ST — STE memory, Wikipedia—link(accessed 2026-03-27)
- ↑ Atari ST Memory Information — 2.5 MB note, info-coach.fr—link(accessed 2026-03-27)
- ↑ Atari ST — STE palette, Wikipedia—link(accessed 2026-03-27)
- ↑ Atari STE Hardware — Scrolling registers, info-coach.fr—link(accessed 2026-03-27)
- ↑ The Atari Compendium — STe/TT DMA Sound, Bus Error mirror—link(accessed 2026-03-27)
- ↑ Atari STE and Mega STE sound fixes, AtariForumWiki—link(accessed 2026-03-27)
- ↑ STE DAC & LMC Fix, exxos — The LaST Upgrade—link(accessed 2026-03-27)
- ↑ Atari STE Hardware — Joysticks/Paddles, info-coach.fr—link(accessed 2026-03-27)
- ↑ Atari STE Hardware — ROM jumpers, info-coach.fr—link(accessed 2026-03-27)
- ↑ Atari STE Hardware — TOS 68030 detection, info-coach.fr—link(accessed 2026-03-27)
- ↑ Atari ST motherboard revisions, AtariForumWiki—link(accessed 2026-03-27)
- ↑ The LaST Upgrade — Atari PSU Repair, exxos—link(accessed 2026-03-27)