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== Troubleshooting ==
== Troubleshooting ==
A complete guide to common issues including no chime, no video, checkerboard pattern, logic board failure, and hard drive detection issues is available at the [[Macintosh Classic / Classic II Troubleshooting]] page.
A complete guide to common issues including no chime, no video, checkerboard pattern, logic board failure, and hard drive detection issues is available at the [[Macintosh Classic / Classic II Troubleshooting]] page.
== Technical Details ==
<templatestyles src="Template:StyledTable/styles.css" />
=== System Architecture at a Glance ===
{| class="wikitable styled-table" style="width:95%; text-align:center;"
! Sub-system !! Specification (Macintosh Classic II / Performa 200, Oct 1991)
|-
| '''CPU''' || Motorola 68030 @ 16.67 MHz (33.33 MHz ÷ 2) 
*Internal 32-bit core on a '''16-bit external data bus'''
|-
| '''FPU''' || — (none; 68882 socket removed to cut cost)
|-
| '''Chipset''' || '''“V8 Lite”''' ASIC (MEMCjr + I/O GLU) handles DRAM, video DMA, VIA timers 
|-
| '''ROM''' || '''512 KB “IIci-class”''' ROM SIMM (v7.1) — Color QD 1.3, 32-bit clean, SCSI Mgr 4.3
|-
| '''RAM (base)''' || 2 MB soldered (8 × 256 K × 4 DRAM, 100 ns)
|-
| '''RAM (slots)''' || 2 × 30-pin SIMM — accepts 256 KB, 1 MB, 4 MB (80 ns) 
'''Max = 10 MB''' (2 MB on-board + 2 × 4 MB)
|-
| '''Video''' || 512 × 342 mono (22.1 KB) DMA-steals from main DRAM 
VRAM “page” is dual-ported inside MEMCjr
|-
| '''Sound''' || 8-bit PWM DAC via VIA Timer-1 • 22 kHz → RC filter → LM380 amp
|-
| '''Storage''' || Internal Apple FDHD 1.44 MB (SWIM-II) • 40–160 MB 2.5″ SCSI HDD
|-
| '''Ports''' || ADB • DB-19 ext floppy • DB-25 SCSI-1 • RS-422 serial × 2 • 3.5 mm audio-out
|-
| '''Expansion''' || '''No PDS'''; logic-board edge exposes debug pads only.
|}
=== Physical Memory Map ===
{| class="wikitable styled-table" style="width:85%; text-align:center;"
|+ '''Classic II Address Space'''
! Range (hex) !! Size !! Purpose
|-
| $0000 00 – $1FFF FF || 2 MB || '''On-board DRAM''' (base memory)
|-
| $2000 00 – $9FFF FF || 8 MB || '''SIMM DRAM banks''' (if present)
|-
| $4000 00 – $47FF FF || 512 KB || '''ROM SIMM''' (v7.1)
|-
| $5000 00 – $50FF FF || 64 KB || '''I/O Bank A''' — VIA-1/2, SCC, SWIM-II, V8 Lite, Egret
|-
| $5800 00 – $58FF FF || 64 KB || '''NCR 53C96 SCSI''' + glue
|-
| $5C00 00 – $5FFF FF || 256 KB || '''Unused / test decode'''
|-
| $9000 00 – $9000 FF || 256 B || '''Video shift register''' (mirrored)
|-
| $C000 00 – $FF FF FF || Mirror / reserved
|}
*Frame-buffer:* 22,016-byte screen bitmap sits at top of total DRAM (e.g. $9FE000–$9FFFFF in a 10 MB system).
=== ROM SIMM Breakdown (512 KB, v7.1) ===
{| class="wikitable styled-table" style="width:90%;"
! Offset !! Size !! Module
|-
| $4000 00 || 16 KB || 68030 vectors + micro-shell
|-
| $4004 00 || 64 KB || Color / Mono QuickDraw 1.3 (32-bit)
|-
| $4014 00 || 192 KB || Toolbox, Window/Menu mgrs., SANE FP
|-
| $4044 00 || 80 KB || SWIM-II, ASC 8-bit audio, Egret ADB
|-
| $405E 00 || 96 KB || SCSI Mgr 4.3, Disk Cache, HFS/HFS+
|}
=== Key Silicon & I/O Devices ===
* '''MEMCjr / V8 Lite ASIC''' — DRAM controller, 68030 bus mux, video DMA, VIA handshake 
* '''6522 VIA × 2''' — timers, sound PWM, keyboard latch 
* '''8530 SCC''' — dual RS-422 serial (GeoPort ready) 
* '''SWIM-II''' — GCR/MFM floppy (800 KB & 1.44 MB) 
* '''NCR 53C96''' — fast SCSI, 8-bit DMA style 
* '''Egret 68HC05''' — ADB host, PRAM, soft-power, real-time clock
=== DRAM & SIMM Configuration ===
{| class="wikitable styled-table" style="width:70%; text-align:center;"
! Total RAM !! On-board !! SIMM 1 !! SIMM 2 !! Notes
|-
| 2 MB || 2 MB || — || — || Base model
|-
| 4 MB || 2 MB || 1 MB || 1 MB || SIMMs must match size/speed
|-
| 6 MB || 2 MB || 2 MB || 2 MB || (rare)
|-
| 8 MB || 2 MB || 3 MB* || 3 MB* || *3 MB = 1 MB + 2 MB parity boards
|-
| 10 MB || 2 MB || 4 MB || 4 MB || Official maximum
|}
*SIMM requirements:* 
30-pin, 80 ns, 8-chip, non-parity (parity ignored). 
Logic board auto-detects via address-pin strapping; no jumpers.
=== Video Timing ===
{| class="wikitable styled-table" style="width:65%; text-align:center;"
! Parameter !! Value
|-
| Pixel clock || 15.667 MHz (÷ 1)
|-
| Horizontal total || 704 px (512 active)
|-
| Vertical total || 370 lines (342 active)
|-
| Refresh rate || 60.15 Hz
|}
### Performance Snapshot (MacBench 1.0)
{| class="wikitable styled-table" style="width:70%; text-align:center;"
! Test !! Score !! vs SE/30
|-
| CPU integer || 135 || 0.47× 
|-
| Disk (80 MB) || 240 || 0.20× 
|-
| Graphics || 110 || 0.45× 
|-
| Overall || 128 || 0.50× 
|}
> *Classic II halves the SE/30’s performance despite sharing a 68030, due to the 16-bit data path, slower DRAM, and “pseudo-DMA” SCSI.*
=== Notable Design Traits & Trivia ===
* Marketed as '''Performa 200''' (consumer bundle) in some regions. 
* Last all-in-one Macintosh to support '''32-bit clean ROM''' but ships with '''24-bit addressing forced'''; Mode32 enabler restores full 32-bit memory access. 
* “'''Paris'''” logic-board codename; PCB bears Eiffel-Tower silkscreen. 
* Developer jumper JP3 forces Debug-ROM shell on cold boot for board-level diagnostics. 
* Hidden ROM tone: press '''⌘ + ⌥ + ⌫ + Power''' to trigger a harmonic “strum” on cold start.


[[Category:Apple Vintage Computers]]
[[Category:Apple Vintage Computers]]
{{Navbox-AppleVintage}}
{{Navbox-AppleVintage}}

Revision as of 13:02, 23 April 2025

Macintosh Classic II
Macintosh Classic II
Specifications
ManufacturerApple Computer, Inc.
TypePersonal Computer
ReleasedOctober 21, 1991
DiscontinuedSeptember 13, 1993
Intro priceUS$1,900
CPUMotorola 68030 @ 16 MHz
Memory2 MB RAM (expandable to 10 MB)
Storage1.44 MB 3.5" floppy drive, optional 40–80 MB SCSI hard drive
Display9" monochrome CRT (512×342 pixels)
SoundMonaural 8-bit, 22 kHz
Dimensions13.2" H × 9.6" W × 10.9" D
Weight16.5 lbs (7.5 kg)
OS / FirmwareSystem 6.0.8L – System 7.6.1
PredecessorMacintosh Classic
SuccessorMacintosh Color Classic
CodenamePerforma, Stardust, Apollo
Model no.M0420, M4150

The Macintosh Classic II, released in 1991, was the final compact black-and-white Macintosh to use the classic all-in-one design. Unlike its predecessor, it utilized the more advanced Motorola 68030 processor—similar to the SE/30—but without the PDS expansion slot or 32-bit clean ROM. It came with 2 MB of RAM standard and supported up to 10 MB via a single 100 ns 30-pin SIMM. The Classic II retained the 9-inch monochrome display, making it ideal for schools and business use, but with improved performance and more modern architecture.

General Maintenance

Due to the similarities witth the Macintosh Classic, for details on disassembly, cleaning, voltage regulation, PRAM battery handling, and corrosion prevention, refer to the Macintosh Classic / Classic II General Maintenance page.

PCB Schematics & Service Manual

The Classic II consists of a logic board and analog board, similar in layout to the Macintosh SE/30 but with different ICs and no expansion slot. The analog board for the Classic II is identical to the Macintosh Classic. However, the logic board in the Classic II has a complete redesign.

Apple Service Manual

All Apple Service Manuals can be found on the Apple Service Source page.

Logic Board & Analog Board Schematics

Macintosh Classic II PCB Schematics
Logic Board Analog Board
Macintosh Classic II Logic Board
File:Macintosh Classic II Schematic.pdf
Macintosh Classic Analog Board
File:Classic Analog Board Schematic.pdf

Capacitor Replacement Guide

The Classic II is prone to logic board failure due to surface-mount capacitor leakage. For safe replacement procedures, refer to the Macintosh Classic II Capacitor Replacement Guide.

Retrobrite

For plastic restoration and case whitening instructions, visit the Retrobrite page.

Troubleshooting

A complete guide to common issues including no chime, no video, checkerboard pattern, logic board failure, and hard drive detection issues is available at the Macintosh Classic / Classic II Troubleshooting page.

Technical Details

System Architecture at a Glance

Sub-system Specification (Macintosh Classic II / Performa 200, Oct 1991)
CPU Motorola 68030 @ 16.67 MHz (33.33 MHz ÷ 2)
  • Internal 32-bit core on a 16-bit external data bus
FPU — (none; 68882 socket removed to cut cost)
Chipset “V8 Lite” ASIC (MEMCjr + I/O GLU) handles DRAM, video DMA, VIA timers
ROM 512 KB “IIci-class” ROM SIMM (v7.1) — Color QD 1.3, 32-bit clean, SCSI Mgr 4.3
RAM (base) 2 MB soldered (8 × 256 K × 4 DRAM, 100 ns)
RAM (slots) 2 × 30-pin SIMM — accepts 256 KB, 1 MB, 4 MB (80 ns)

Max = 10 MB (2 MB on-board + 2 × 4 MB)

Video 512 × 342 mono (22.1 KB) DMA-steals from main DRAM

VRAM “page” is dual-ported inside MEMCjr

Sound 8-bit PWM DAC via VIA Timer-1 • 22 kHz → RC filter → LM380 amp
Storage Internal Apple FDHD 1.44 MB (SWIM-II) • 40–160 MB 2.5″ SCSI HDD
Ports ADB • DB-19 ext floppy • DB-25 SCSI-1 • RS-422 serial × 2 • 3.5 mm audio-out
Expansion No PDS; logic-board edge exposes debug pads only.

Physical Memory Map

Classic II Address Space
Range (hex) Size Purpose
$0000 00 – $1FFF FF 2 MB On-board DRAM (base memory)
$2000 00 – $9FFF FF 8 MB SIMM DRAM banks (if present)
$4000 00 – $47FF FF 512 KB ROM SIMM (v7.1)
$5000 00 – $50FF FF 64 KB I/O Bank A — VIA-1/2, SCC, SWIM-II, V8 Lite, Egret
$5800 00 – $58FF FF 64 KB NCR 53C96 SCSI + glue
$5C00 00 – $5FFF FF 256 KB Unused / test decode
$9000 00 – $9000 FF 256 B Video shift register (mirrored)
$C000 00 – $FF FF FF Mirror / reserved
  • Frame-buffer:* 22,016-byte screen bitmap sits at top of total DRAM (e.g. $9FE000–$9FFFFF in a 10 MB system).

ROM SIMM Breakdown (512 KB, v7.1)

Offset Size Module
$4000 00 16 KB 68030 vectors + micro-shell
$4004 00 64 KB Color / Mono QuickDraw 1.3 (32-bit)
$4014 00 192 KB Toolbox, Window/Menu mgrs., SANE FP
$4044 00 80 KB SWIM-II, ASC 8-bit audio, Egret ADB
$405E 00 96 KB SCSI Mgr 4.3, Disk Cache, HFS/HFS+

Key Silicon & I/O Devices

  • MEMCjr / V8 Lite ASIC — DRAM controller, 68030 bus mux, video DMA, VIA handshake
  • 6522 VIA × 2 — timers, sound PWM, keyboard latch
  • 8530 SCC — dual RS-422 serial (GeoPort ready)
  • SWIM-II — GCR/MFM floppy (800 KB & 1.44 MB)
  • NCR 53C96 — fast SCSI, 8-bit DMA style
  • Egret 68HC05 — ADB host, PRAM, soft-power, real-time clock

DRAM & SIMM Configuration

Total RAM On-board SIMM 1 SIMM 2 Notes
2 MB 2 MB — — Base model
4 MB 2 MB 1 MB 1 MB SIMMs must match size/speed
6 MB 2 MB 2 MB 2 MB (rare)
8 MB 2 MB 3 MB* 3 MB* *3 MB = 1 MB + 2 MB parity boards
10 MB 2 MB 4 MB 4 MB Official maximum
  • SIMM requirements:*

30-pin, 80 ns, 8-chip, non-parity (parity ignored). Logic board auto-detects via address-pin strapping; no jumpers.

Video Timing

Parameter Value
Pixel clock 15.667 MHz (÷ 1)
Horizontal total 704 px (512 active)
Vertical total 370 lines (342 active)
Refresh rate 60.15 Hz
      1. Performance Snapshot (MacBench 1.0)
Test Score vs SE/30
CPU integer 135 0.47×
Disk (80 MB) 240 0.20×
Graphics 110 0.45×
Overall 128 0.50×

> *Classic II halves the SE/30’s performance despite sharing a 68030, due to the 16-bit data path, slower DRAM, and “pseudo-DMA” SCSI.*

Notable Design Traits & Trivia

  • Marketed as Performa 200 (consumer bundle) in some regions.
  • Last all-in-one Macintosh to support 32-bit clean ROM but ships with 24-bit addressing forced; Mode32 enabler restores full 32-bit memory access.
  • “Paris” logic-board codename; PCB bears Eiffel-Tower silkscreen.
  • Developer jumper JP3 forces Debug-ROM shell on cold boot for board-level diagnostics.
  • Hidden ROM tone: press ⌘ + ⌥ + ⌫ + Power to trigger a harmonic “strum” on cold start.
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